[PATCH v2] drm/i915: Add debugs to catch delays during updates
Stanislav Lisovskiy
stanislav.lisovskiy at intel.com
Fri Jul 17 15:04:12 UTC 2020
v2: - Check also plane programming
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 6 ++++
drivers/gpu/drm/i915/display/intel_display.c | 33 ++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_sprite.c | 11 +++++++
3 files changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 79032701873a..effd88d44a6f 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -423,6 +423,7 @@ void intel_disable_plane(struct intel_plane *plane,
void skl_update_planes_on_crtc(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct intel_crtc_state *new_crtc_state =
@@ -431,6 +432,7 @@ void skl_update_planes_on_crtc(struct intel_atomic_state *state,
struct skl_ddb_entry entries_uv[I915_MAX_PLANES];
u32 update_mask = new_crtc_state->update_planes;
struct intel_plane *plane;
+ ktime_t t = ktime_get(), t2;
memcpy(entries_y, old_crtc_state->wm.skl.plane_ddb_y,
sizeof(old_crtc_state->wm.skl.plane_ddb_y));
@@ -450,6 +452,10 @@ void skl_update_planes_on_crtc(struct intel_atomic_state *state,
intel_disable_plane(plane, new_crtc_state);
}
}
+
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm, "Updating planes took %llu us\n", ktime_us_delta(t2, t));
}
void i9xx_update_planes_on_crtc(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index dff7c17f3d2b..79c9d27e5b89 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15117,6 +15117,7 @@ static void commit_pipe_config(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
bool modeset = needs_modeset(new_crtc_state);
+ ktime_t t = ktime_get(), t2;
/*
* During modesets pipe configuration was programmed as the
@@ -15127,22 +15128,52 @@ static void commit_pipe_config(struct intel_atomic_state *state,
new_crtc_state->update_pipe)
intel_color_commit(new_crtc_state);
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm,
+ "intel_color_commit took %llu us!\n", ktime_us_delta(t2, t));
+ t = t2;
+
if (INTEL_GEN(dev_priv) >= 9)
skl_detach_scalers(new_crtc_state);
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm,
+ "skl_detach_scalers took %llu us!\n", ktime_us_delta(t2, t));
+ t = t2;
+
if (INTEL_GEN(dev_priv) >= 9 || IS_BROADWELL(dev_priv))
bdw_set_pipemisc(new_crtc_state);
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm,
+ "bdw_set_pipemisc took %llu us!\n", ktime_us_delta(t2, t));
+ t = t2;
+
if (new_crtc_state->update_pipe)
intel_pipe_fastset(old_crtc_state, new_crtc_state);
+
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm,
+ "intel_pipe_fastset took %llu us!\n", ktime_us_delta(t2, t));
+ t = t2;
+
}
if (dev_priv->display.atomic_update_watermarks)
dev_priv->display.atomic_update_watermarks(state, crtc);
+
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm,
+ "atomic_update_watermarks took %llu us!\n", ktime_us_delta(t2, t));
}
static void intel_enable_crtc(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+ struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 2ded360566c7..bc185c71b450 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -627,6 +627,7 @@ skl_program_plane(struct intel_plane *plane,
unsigned long irqflags;
u32 keymsk, keymax;
u32 plane_ctl = plane_state->ctl;
+ ktime_t t, t2;
plane_ctl |= skl_plane_ctl_crtc(crtc_state);
@@ -650,7 +651,13 @@ skl_program_plane(struct intel_plane *plane,
crtc_y = 0;
}
+ t = ktime_get();
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm, "uncore locking took %llu us\n", ktime_us_delta(t2, t));
+
+ t = t2;
intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id), stride);
intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
@@ -699,6 +706,10 @@ skl_program_plane(struct intel_plane *plane,
if (plane_state->scaler_id >= 0)
skl_program_scaler(plane, crtc_state, plane_state);
+ t2 = ktime_get();
+ if (ktime_us_delta(t2, t) >= 50)
+ drm_warn(&dev_priv->drm, "plane programming took %llu us\n", ktime_us_delta(t2, t));
+
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
--
2.24.1.485.gad05a3d8e5
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