[PATCH i-g-t 2/3] hostile-int

[Chris Wilson]

---
 lib/i915/gem_mman.h           |  5 +--
 tests/i915/gem_exec_hostile.c | 78 +++++++++++++++++++++++++++++++++++
 2 files changed, 79 insertions(+), 4 deletions(-)

diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 2c4a7a00b..349eafb56 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -26,6 +26,7 @@
 #define GEM_MMAN_H
 
 #include <stdint.h>
+#include <stdbool.h>
 
 void *gem_mmap__gtt(int fd, uint32_t handle, uint64_t size, unsigned prot);
 void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
@@ -42,10 +43,6 @@ void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
 			     uint64_t size, unsigned prot);
 
-#ifndef I915_GEM_DOMAIN_WC
-#define I915_GEM_DOMAIN_WC 0x80
-#endif
-
 bool gem_has_mappable_ggtt(int i915);
 void gem_require_mappable_ggtt(int i915);
 bool gem_has_mmap_offset(int fd);
diff --git a/tests/i915/gem_exec_hostile.c b/tests/i915/gem_exec_hostile.c
index 743dbe7c3..588a4cd25 100644
--- a/tests/i915/gem_exec_hostile.c
+++ b/tests/i915/gem_exec_hostile.c
@@ -23,9 +23,12 @@
 
 #include <fcntl.h>
 #include <sys/ioctl.h>
+#include <sys/poll.h>
 
 #include "i915/gem.h"
+#include "i915/gem_mman.h"
 #include "igt.h"
+#include "igt_perf.h"
 
 #define MI_INSTR(opcode, flags) (((opcode) << 23) | (flags))
 
@@ -303,6 +306,78 @@ static void far_fence(int i915)
 
 	gem_close(i915, handle);
 }
+static void many_interrupts(int i915)
+{
+	const int gen = intel_gen(intel_get_drm_devid(i915));
+	const struct intel_execution_engine2 *e;
+	unsigned int sz = 4 << 20;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, sz),
+		.flags = EXEC_OBJECT_PINNED,
+		.offset = 48 << 20,
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+	};
+	uint32_t *cs, *map, *end;
+	uint64_t i_before[2], i_after[2];
+	int fd;
+
+	fd = perf_i915_open(i915, I915_PMU_INTERRUPTS);
+
+	map = cs = gem_mmap__device_coherent(i915, obj.handle, 0, sz, PROT_WRITE);
+	for (unsigned int n = 0; n < sz / sizeof(*cs); n++)
+		*cs++ = 0x2 << 23;
+
+	end = cs -= 4;
+	*cs++ = 0x5 << 23;
+	if (gen >= 8) {
+		*cs++ = MI_BATCH_BUFFER_START | 1 << 8 | 1;
+		*cs++ = obj.offset;
+		*cs++ = 0;
+	} else if (gen >= 6) {
+		*cs++ = MI_BATCH_BUFFER_START | 1 << 8;
+		*cs++ = obj.offset;
+	} else {
+		*cs++ = MI_BATCH_BUFFER_START | 2 << 6;
+		*cs++ = obj.offset | 1;
+	}
+
+	__for_each_physical_engine(i915, e) {
+		struct pollfd pfd;
+
+		if (!gem_class_has_mutable_submission(i915, e->class))
+			continue;
+
+		execbuf.flags = e->flags | I915_EXEC_FENCE_OUT;
+		gem_execbuf_wr(i915, &execbuf);
+
+		/* Do a dummy wait to enable interrupts on each engine */
+		pfd.fd = execbuf.rsvd2 >> 32;
+		pfd.events = POLLIN;
+		poll(&pfd, 1, 1);
+		close(pfd.fd);
+	}
+
+	read(fd, i_before, sizeof(i_before));
+	sleep(30); /* wait long enough for NMI watchdogs to kick in */
+	read(fd, i_after, sizeof(i_after));
+
+	*end = MI_BATCH_BUFFER_END;
+	__sync_synchronize();
+	munmap(map, sz);
+
+	if (fd != -1) {
+		igt_info("Generated %"PRId64" interrupts (%.2e/s)\n",
+			 i_after[0] - i_before[0],
+			 (i_after[0] - i_before[0]) * 1e9 / (i_after[1] - i_before[1]));
+		close(fd);
+	}
+
+	gem_sync(i915, obj.handle);
+	gem_close(i915, obj.handle);
+}
 
 igt_main
 {
@@ -317,6 +392,9 @@ igt_main
 		far_fence(i915);
 	}
 
+	igt_subtest("many-interrupts")
+		many_interrupts(i915);
+
 	igt_fixture {
 		close(i915);
 	}
-- 
2.28.0.rc1