[PATCH] drm/i915: Add some latency overhead for TGL

[Stanislav Lisovskiy]

This currently might help to resolve FIFO underuns
until proper fix is done.

Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 26b670fa3f88..119c67b5c1fd 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5265,6 +5265,9 @@ static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
 	if (skl_needs_memory_bw_wa(dev_priv) && wp->x_tiled)
 		latency += 15;
 
+	if (IS_TIGERLAKE(dev_priv))
+		latency += 20;
+
 	method1 = skl_wm_method1(dev_priv, wp->plane_pixel_rate,
 				 wp->cpp, latency, wp->dbuf_block_size);
 	method2 = skl_wm_method2(wp->plane_pixel_rate,
-- 
2.24.1.485.gad05a3d8e5