[v7 11/12] drm/i915/lspcon: Add retries for MCA LSPCON r/w operations

[Uma Shankar]

There are some intermittent failures to read and write on MCA
LSPCON through DPCD when we perform suspend/resume cycles. Adding
few retries to add stability.

Signed-off-by: Uma Shankar <uma.shankar at intel.com>
---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 45 +++++++++++++++------
 1 file changed, 33 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 52334747fb01..95ab5d77e581 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -433,27 +433,48 @@ static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux *aux,
 
 	val = 0;
 	reg = LSPCON_MCA_AVI_IF_CTRL;
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
-	if (ret < 0) {
-		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
-		return false;
+	for (retry = 0; retry < 5; retry++) {
+		ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+		if (ret >= 0) {
+			break;
+		} else if (retry < 4) {
+			mdelay(50);
+			continue;
+		} else {
+			DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+			return false;
+		}
 	}
 
 	/* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
 	val &= ~LSPCON_MCA_AVI_IF_HANDLED;
 	val |= LSPCON_MCA_AVI_IF_KICKOFF;
 
-	ret = drm_dp_dpcd_write(aux, reg, &val, 1);
-	if (ret < 0) {
-		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
-		return false;
+	for (retry = 0; retry < 5; retry++) {
+		ret = drm_dp_dpcd_write(aux, reg, &val, 1);
+		if (ret >= 0) {
+			break;
+		} else if (retry < 4) {
+			mdelay(50);
+			continue;
+		} else {
+			DRM_ERROR("DPCD write failed, address 0x%x\n", reg);
+			return false;
+		}
 	}
 
 	val = 0;
-	ret = drm_dp_dpcd_read(aux, reg, &val, 1);
-	if (ret < 0) {
-		DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
-		return false;
+	for (retry = 0; retry < 5; retry++) {
+		ret = drm_dp_dpcd_read(aux, reg, &val, 1);
+		if (ret >= 0) {
+			break;
+		} else if (retry < 4) {
+			mdelay(50);
+			continue;
+		} else {
+			DRM_ERROR("DPCD read failed, address 0x%x\n", reg);
+			return false;
+		}
 	}
 
 	if (val == LSPCON_MCA_AVI_IF_HANDLED)
-- 
2.22.0