[PATCH 12/12] ce-sentinel

[Chris Wilson]

From: Chris Wilson <ickle at kabylake.alporthouse.com>

---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  3 +++
 drivers/gpu/drm/i915/gt/intel_context.h       | 10 ++++++++++
 drivers/gpu/drm/i915/gt/intel_context_types.h |  1 +
 drivers/gpu/drm/i915/i915_request.c           |  5 +++++
 4 files changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index f5d59d18cd5b..583f312eb819 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -229,6 +229,9 @@ static void intel_context_set_gem(struct intel_context *ce,
 	if (ctx->timeline)
 		ce->timeline = intel_timeline_get(ctx->timeline);
 
+	if (ce->engine->class == VIDEO_DECODE_CLASS)
+		intel_context_set_sentinel(ce);
+
 	if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
 	    intel_engine_has_timeslices(ce->engine))
 		__set_bit(CONTEXT_USE_SEMAPHORES, &ce->flags);
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h
index 07be021882cc..6ad41bfa1ede 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -203,6 +203,16 @@ static inline bool intel_context_set_banned(struct intel_context *ce)
 	return test_and_set_bit(CONTEXT_BANNED, &ce->flags);
 }
 
+static inline bool intel_context_set_sentinel(const struct intel_context *ce)
+{
+	return test_bit(CONTEXT_SENTINEL, &ce->flags);
+}
+
+static inline bool intel_context_is_sentinel(const struct intel_context *ce)
+{
+	return test_bit(CONTEXT_SENTINEL, &ce->flags);
+}
+
 static inline bool
 intel_context_force_single_submission(const struct intel_context *ce)
 {
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 4954b0df4864..76e5a0838b08 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -67,6 +67,7 @@ struct intel_context {
 #define CONTEXT_BANNED			5
 #define CONTEXT_FORCE_SINGLE_SUBMISSION	6
 #define CONTEXT_NOPREEMPT		7
+#define CONTEXT_SENTINEL		8
 
 	u32 *lrc_reg_state;
 	union {
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 91a210234904..117f45123ebb 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -777,6 +777,11 @@ __i915_request_create(struct intel_context *ce, gfp_t gfp)
 	rq->fence.error = 0;
 	INIT_LIST_HEAD(&rq->fence.cb_list);
 
+	if (intel_context_is_sentinel(ce)) {
+		__set_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags);
+		__set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
+	}
+
 	ret = intel_timeline_get_seqno(tl, rq, &seqno);
 	if (ret)
 		goto err_free;
-- 
2.20.1