[PATCH] drm/i915/gt: Disable powergating [rc6] across reset and resume

[Chris Wilson]

On the resume following reset, we have to reapply various default
register settings. This requires a clean environment, such as ensuring
powergating is disabled. Before we issue the device reset, disable rc6
(and powergating) and rps/llc for symmetry. On resume, we can then bring
them back on line as soon as the GPU is ready to do so.

Reported-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay at intel.com>
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index a377c4588aaa..3f4b2ecc1d1e 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1055,6 +1055,11 @@ void intel_gt_reset(struct intel_gt *gt,
 	if (INTEL_INFO(gt->i915)->gpu_reset_clobbers_display)
 		intel_runtime_pm_disable_interrupts(gt->i915);
 
+	/* Disable powergating and friends, so we can resume afresh */
+	intel_rc6_disable(&gt->rc6);
+	intel_rps_disable(&gt->rps);
+	intel_llc_disable(&gt->llc);
+
 	if (do_reset(gt, stalled_mask)) {
 		drm_err(&gt->i915->drm, "Failed to reset chip\n");
 		goto taint;
@@ -1081,10 +1086,15 @@ void intel_gt_reset(struct intel_gt *gt,
 		goto taint;
 	}
 
+	intel_rps_enable(&gt->rps);
+	intel_llc_enable(&gt->llc);
+
 	ret = resume(gt);
 	if (ret)
 		goto taint;
 
+	intel_rc6_enable(&gt->rc6);
+
 finish:
 	reset_finish(gt, awake);
 unlock:
-- 
2.20.1