✗ Fi.CI.BAT: failure for series starting with [01/68] drm/i915/gt: Restrict the GT clock override to just Icelake
Patchwork
patchwork at emeril.freedesktop.org
Mon Feb 1 01:58:29 UTC 2021
== Series Details ==
Series: series starting with [01/68] drm/i915/gt: Restrict the GT clock override to just Icelake
URL : https://patchwork.freedesktop.org/series/86505/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9709 -> Trybot_7525
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Trybot_7525 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Trybot_7525, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/index.html
New tests
---------
New tests have been introduced between CI_DRM_9709 and Trybot_7525:
### New IGT tests (1) ###
* igt at i915_selftest@live at scheduler:
- Statuses : 17 pass(s)
- Exec time: [0.74, 8.76] s
Known issues
------------
Here are the changes found in Trybot_7525 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at gem_ringfill@basic-all:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-tgl-y/igt@gem_ringfill@basic-all.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-tgl-y/igt@gem_ringfill@basic-all.html
* igt at i915_selftest@live at execlists:
- fi-cfl-8109u: [PASS][3] -> [INCOMPLETE][4] ([i915#1037])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-cfl-8109u/igt@i915_selftest@live@execlists.html
- fi-icl-u2: [PASS][5] -> [INCOMPLETE][6] ([i915#1037] / [i915#2276])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-icl-u2/igt@i915_selftest@live@execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-icl-u2/igt@i915_selftest@live@execlists.html
- fi-tgl-y: [PASS][7] -> [INCOMPLETE][8] ([i915#2268])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-tgl-y/igt@i915_selftest@live@execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-tgl-y/igt@i915_selftest@live@execlists.html
- fi-tgl-u2: [PASS][9] -> [INCOMPLETE][10] ([i915#2268])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-tgl-u2/igt@i915_selftest@live@execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-tgl-u2/igt@i915_selftest@live@execlists.html
- fi-icl-y: [PASS][11] -> [INCOMPLETE][12] ([i915#1037] / [i915#2276])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-icl-y/igt@i915_selftest@live@execlists.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-icl-y/igt@i915_selftest@live@execlists.html
#### Possible fixes ####
* igt at gem_render_tiled_blits@basic:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9709/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/fi-tgl-y/igt@gem_render_tiled_blits@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1037]: https://gitlab.freedesktop.org/drm/intel/issues/1037
[i915#2268]: https://gitlab.freedesktop.org/drm/intel/issues/2268
[i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (44 -> 20)
------------------------------
ERROR: It appears as if the changes made in Trybot_7525 prevented too many machines from booting.
Missing (24): fi-kbl-soraka fi-apl-guc fi-skl-6600u fi-cml-u2 fi-bxt-dsi fi-cml-s fi-bsw-n3050 fi-glk-dsi fi-kbl-7500u fi-bsw-nick fi-skl-6700k2 fi-kbl-r fi-ilk-m540 fi-skl-guc fi-cfl-8700k fi-jsl-1 fi-hsw-4200u fi-bsw-cyan fi-cfl-guc fi-kbl-guc fi-kbl-x1275 fi-kbl-8809g fi-bsw-kefka fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9709 -> Trybot_7525
CI-20190529: 20190529
CI_DRM_9709: 56a8ec3a493d37af36b98e35a5d7831f58e59cf1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5980: e02612921a4e95aef3a368e7468f4337c9dcee7d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_7525: eed2dbcb96b166ec3f39b2feee7098229daebb04 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
eed2dbcb96b1 el-sched
f1c8a44e7eb1 sched->engine
8a281aa5d8ae sched.engine
1512643d9445 hide-rq.engine
d482d5f74193 ce-breadcrumbs
149c9475bab1 submit-engine
ef15201f99f9 pass-engine-to-bb_start
55965e199460 pass-engine-to-flush
46cf642e89e1 pass-engine-to-breadcrumb
6e9d382d2751 cops-request-init
935637209dce tiebreak
e77d869d4e05 drm/i915/gt: Limit C-states while waiting for requests
0a56f6b0328e drm/i915: Support secure dispatch on gen6/gen7
509cc27b2083 drm/i915/gt: Enable ring scheduling for gen5-7
192ee6bc5962 drm/i915/gt: Implement ring scheduler for gen4-7
dd087f8a688e drm/i915/gt: Infrastructure for ring scheduling
c284aaeba236 drm/i915/gt: Use client timeline address for seqno writes
e09063e75c9f drm/i915/gt: Support creation of 'internal' rings
4c0e2d7cc4db drm/i915/gt: Couple tasklet scheduling for all CS interrupts
83bf24eddb35 Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
46b940713b04 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
2dc9dc7ebbf9 drm/i915/selftests: Exercise relative timeline modes
8675a67ae46c drm/i915/gt: Use indices for writing into relative timelines
1441ca706474 drm/i915/gt: Add timeline "mode"
339234f99fe2 drm/i915/gt: Track timeline GGTT offset separately from subpage offset
ccf3b5e33ddf drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
2b97f0c09023 drm/i915/gt: Delay taking irqoff for execlists submission
5849556df3b1 drm/i915: Bump default timeslicing quantum to 5ms
12ac4952966d drm/i915: Move saturated workload detection back to the context
14359ae9e5fb drm/i915/gt: Support virtual engine queues
775d2bf44b40 drm/i915: Extend the priority boosting for the display with a deadline
58b6405ef89e drm/i915/gt: Specify a deadline for the heartbeat
afc90a4ae2ed drm/i915: Fair low-latency scheduling
cfe6519355d0 drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
601d49c78736 drm/i915: Replace priolist rbtree with a skiplist
6f903a1d9776 drm/i915: Move preempt-reset flag to the scheduler
15c1ca580303 drm/i915: Move busywaiting control to the scheduler
7fc18027637a drm/i915: Move needs-breadcrumb flags to scheduler
2be62a232c33 drm/i915/gt: Declare when we enabled timeslicing
999a75608060 drm/i915: Move timeslicing flag to scheduler
bf97a16ba32d drm/i915: Move scheduler flags
378b29b0ec6f drm/i915: Wrap i915_request_use_semaphores()
b13b46e105d8 drm/i915: Show execlists queues when dumping state
70343672d0bb drm/i915: Move finding the current active request to the scheduler
59c5e3761539 drm/i915: Move submit_request to i915_sched_engine
cfdec53422e3 drm/i915/gt: Only kick the scheduler on timeslice/preemption change
7242872d656c drm/i915: Move scheduler queue
50e111db2235 drm/i915: Move common active lists from engine to i915_scheduler
086cfa24d74e drm/i915: Wrap access to intel_engine.active
f9c3aaa68b16 drm/i915: Fix the iterative dfs for defering requests
2488bbd91d15 drm/i915: Extract the ability to defer and rerun a request later
8962c6fa5f83 drm/i915: Extract request suspension from the execlists
2f2b2f3c99f8 drm/i915: Extract request rewinding from execlists
5a93052ec475 drm/i915: Extract request submission from execlists
0b4efaa2e477 drm/i915: Improve DFS for priority inheritance
eccdca9ea052 drm/i915/selftests: Force a rewind if at first we don't succeed
a386d0e9e48a drm/i915/selftests: Exercise priority inheritance around an engine loop
850015a2aa6a drm/i915/selftests: Measure set-priority duration
af19fa2f535b drm/i915: Restructure priority inheritance
7afb43329f86 drm/i915: Replace engine->schedule() with a known request operation
1cc049e9ec0e drm/i915/gt: Move submission_method into intel_gt
b8b070bb9f51 drm/i915/gt: Move engine setup out of set_default_submission
4f0ff2493b31 drm/i915/gt: Always flush the submission queue on checking for idle
1ff60f61c668 drm/i915: Take rcu_read_lock for querying fence's driver/timeline names
5bba13aebaf4 drm/i915: Protect against request freeing during cancellation on wedging
758f05ccf7f5 drm/i915/selftests: Exercise cross-process context isolation
ea3a2b47e7e6 drm/i915/selftests: Exercise relative mmio paths to non-privileged registers
90fcf72037c0 drm/i915/gt: Restrict the GT clock override to just Icelake
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7525/index.html
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