[PATCH 2/5] dbg

Chris Wilson chris at chris-wilson.co.uk
Sat Feb 13 02:44:30 UTC 2021


---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 28 +++++++++++++++----
 drivers/gpu/drm/i915/i915_vma.c               | 26 +++++++++++++----
 2 files changed, 43 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 283193adb49b..31eff47621cc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -371,25 +371,41 @@ eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
 	const u64 start = i915_vma_offset(vma);
 	const u64 size = i915_vma_size(vma);
 
-	if (size < entry->pad_to_size)
+	if (size < entry->pad_to_size) {
+		GEM_TRACE("vma [%llx, %llx] too small < %lld\n",
+			  start, size, entry->pad_to_size);
 		return true;
+	}
 
-	if (entry->alignment && !IS_ALIGNED(start, entry->alignment))
+	if (entry->alignment && !IS_ALIGNED(start, entry->alignment)) {
+		GEM_TRACE("vma [%llx, %llx] misaligned %llx\n",
+			  start, size, entry->alignment);
 		return true;
+	}
 
-	if (flags & EXEC_OBJECT_PINNED && start != entry->offset)
+	if (flags & EXEC_OBJECT_PINNED && start != entry->offset) {
+		GEM_TRACE("vma [%llx, %llx] pinned != %llx\n",
+			  start, size, entry->offset);
 		return true;
+	}
 
-	if (flags & __EXEC_OBJECT_NEEDS_BIAS && start < BATCH_OFFSET_BIAS)
+	if (flags & __EXEC_OBJECT_NEEDS_BIAS && start < BATCH_OFFSET_BIAS) {
+		GEM_TRACE("vma [%llx, %llx] bias < %x\n",
+			  start, size, BATCH_OFFSET_BIAS);
 		return true;
+	}
 
 	if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
-	    (start + size + 4095) >> 32)
+	    (start + size + 4095) >> 32) {
+		GEM_TRACE("vma [%llx, %llx] !48b\n", start, size);
 		return true;
+	}
 
 	if (flags & __EXEC_OBJECT_NEEDS_MAP &&
-	    !i915_vma_is_map_and_fenceable(vma))
+	    !i915_vma_is_map_and_fenceable(vma)) {
+		GEM_TRACE("vma [%llx, %llx] unfenced\n", start, size);
 		return true;
+	}
 
 	return false;
 }
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 748f5ea1ba04..21d74bcc47d1 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -534,23 +534,39 @@ bool i915_vma_misplaced(const struct i915_vma *vma,
 	if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma)))
 		return true;
 
-	if (i915_vma_size(vma) < size)
+	if (i915_vma_size(vma) < size) {
+		GEM_TRACE("vma [%llx, %llx] too small < %llx\n",
+			  vma->node.start, vma->node.size, size);
 		return true;
+	}
 
 	GEM_BUG_ON(alignment && !is_power_of_2(alignment));
-	if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment))
+	if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment)) {
+		GEM_TRACE("vma [%llx, %llx] misaligned %llx\n",
+			  vma->node.start, vma->node.size, alignment);
 		return true;
+	}
 
-	if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma))
+	if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma)) {
+		GEM_TRACE("vma [%llx, %llx] !mappable\n",
+			  vma->node.start, vma->node.size);
 		return true;
+	}
 
 	if (flags & PIN_OFFSET_BIAS &&
-	    i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK))
+	    i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK)) {
+		GEM_TRACE("vma [%llx, %llx] !bias\n",
+			  vma->node.start, vma->node.size);
 		return true;
+	}
 
 	if (flags & PIN_OFFSET_FIXED &&
-	    i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))
+	    i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK)) {
+		GEM_TRACE("vma [%llx, %llx] pinned != %llx\n",
+			  vma->node.start, vma->node.size,
+			  flags & PIN_OFFSET_MASK);
 		return true;
+	}
 
 	return false;
 }
-- 
2.20.1



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