✓ Fi.CI.BAT: success for series starting with [01/42] drm/i915: Replace engine->schedule() with a known request operation
Patchwork
patchwork at emeril.freedesktop.org
Thu Jan 28 23:23:45 UTC 2021
== Series Details ==
Series: series starting with [01/42] drm/i915: Replace engine->schedule() with a known request operation
URL : https://patchwork.freedesktop.org/series/86401/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9696 -> Trybot_7507
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/index.html
New tests
---------
New tests have been introduced between CI_DRM_9696 and Trybot_7507:
### New IGT tests (1) ###
* igt at i915_selftest@live at scheduler:
- Statuses : 35 pass(s)
- Exec time: [0.73, 9.25] s
Known issues
------------
Here are the changes found in Trybot_7507 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at amdgpu/amd_basic at semaphore:
- fi-bsw-nick: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/fi-bsw-nick/igt@amdgpu/amd_basic@semaphore.html
* igt at kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [PASS][2] -> [FAIL][3] ([i915#1161] / [i915#262])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9696/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
* igt at prime_self_import@basic-with_two_bos:
- fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([i915#402]) +1 similar issue
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9696/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
#### Possible fixes ####
* igt at i915_selftest@live at execlists:
- fi-bsw-nick: [INCOMPLETE][6] ([i915#2940]) -> [PASS][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9696/fi-bsw-nick/igt@i915_selftest@live@execlists.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/fi-bsw-nick/igt@i915_selftest@live@execlists.html
* igt at kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
- fi-tgl-y: [DMESG-WARN][8] ([i915#402]) -> [PASS][9] +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9696/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/fi-tgl-y/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1161]: https://gitlab.freedesktop.org/drm/intel/issues/1161
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (44 -> 39)
------------------------------
Missing (5): fi-jsl-1 fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9696 -> Trybot_7507
CI-20190529: 20190529
CI_DRM_9696: 9fee71c4c03d8101401b895315a97f970036c6a0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5977: 0b6967520b15e73773eace7937ed8c17ba411bc0 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Trybot_7507: a428b5ea7fd692130bc015dbf4ab2c562a8dec70 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a428b5ea7fd6 drm/i915/gt: Reduce engine runtime stats from seqlock to a latch
0362bc733711 drm/i915/gt: Reduce GT runtime stats from seqlock to a latch
469888e376e3 drm/i915/gt: Limit C-states while waiting for requests
4a594cf81fa4 drm/i915: Support secure dispatch on gen6/gen7
c561b3d9b758 drm/i915/gt: Enable ring scheduling for gen5-7
a0033e11d610 drm/i915/gt: Implement ring scheduler for gen4-7
cfefefc085eb drm/i915/gt: Infrastructure for ring scheduling
200c725352b0 drm/i915/gt: Use client timeline address for seqno writes
fc2ee2099c85 drm/i915/gt: Support creation of 'internal' rings
524c0fc26bea drm/i915/gt: Couple tasklet scheduling for all CS interrupts
c1e1b7ba1b0a Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq"
73ce860480b5 drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines
530942a1c84d drm/i915/selftests: Exercise relative timeline modes
c4613db31c15 drm/i915/gt: Use indices for writing into relative timelines
e49fd8b09234 drm/i915/gt: Add timeline "mode"
4879b22c34e8 drm/i915/gt: Track timeline GGTT offset separately from subpage offset
24d2d01f4a2e drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb
5e1876061cca el-shrink-irqoff
c2229af604b4 drm/i915: Bump default timeslicing quantum to 5ms
ba4bba0bd05a drm/i915: Move saturated workload detection back to the context
dac4fe0b828c drm/i915/gt: Support virtual engine queues
83dc99621ede drm/i915: Extend the priority boosting for the display with a deadline
9278e6ee1ae0 drm/i915/gt: Specify a deadline for the heartbeat
72e93607b046 drm/i915: Fair low-latency scheduling
3602cc84104a drm/i915: Wrap cmpxchg64 with try_cmpxchg64() helper
a9b8ae884f71 drm/i915: Replace priolist rbtree with a skiplist
30c132235187 drm/i915: Show execlists queues when dumping state
3a4a3eaa37b0 drm/i915: Move tasklet from execlists to sched
6f4a869e673d drm/i915: Move scheduler queue
c9edb25f86ab drm/i915: Move common active lists from engine to i915_scheduler
b601bcc220c3 drm/i915: Fix the iterative dfs for defering requests
2afd3f3ac6db drm/i915: Extract the ability to defer and rerun a request later
0a43a0147dd4 drm/i915: Extract request suspension from the execlists
4c6c0c99d4ce drm/i915: Extract request rewinding from execlists
cad021fa83ea drm/i915: Extract request submission from execlists
951b01abc0c0 drm/i915/selftests: Exercise cross-process context isolation
54c5bd73f7f7 drm/i915/selftests: Exercise relative mmio paths to non-privileged registers
9f950b401ef5 drm/i915: Improve DFS for priority inheritance
cec032a00e1e drm/i915/selftests: Exercise priority inheritance around an engine loop
6197b712cfd5 drm/i915/selftests: Measure set-priority duration
af2f150d2da9 drm/i915: Restructure priority inheritance
218caab28a2b drm/i915: Replace engine->schedule() with a known request operation
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7507/index.html
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