[PATCH 27/27] drm/i915: Move busywaiting control to the scheduler

[Chris Wilson]

Busy-waiting is use for preempt-to-busy by schedulers, if they so
choose. Since it is not a property of the engine, but that of the
submission backend, move the flag from out of the engine to
i915_sched_engine.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c             | 4 ++--
 drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 6 +++++-
 drivers/gpu/drm/i915/gt/selftest_lrc.c               | 8 +++++---
 drivers/gpu/drm/i915/i915_scheduler_types.h          | 7 +++++++
 4 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index cac80af7ad1c..d5268cfe8dcf 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -507,7 +507,7 @@ gen8_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
 	*cs++ = MI_USER_INTERRUPT;
 
 	*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
-	if (intel_engine_has_semaphores(rq->engine))
+	if (i915_sched_use_busywait(&rq->engine->sched))
 		cs = emit_preempt_busywait(rq, cs);
 
 	rq->tail = intel_ring_offset(rq, cs);
@@ -599,7 +599,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, u32 *cs)
 	*cs++ = MI_USER_INTERRUPT;
 
 	*cs++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;
-	if (intel_engine_has_semaphores(rq->engine))
+	if (i915_sched_use_busywait(&rq->engine->sched))
 		cs = gen12_emit_preempt_busywait(rq, cs);
 
 	rq->tail = intel_ring_offset(rq, cs);
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index 55f79d6891bc..76a2b4c64fbe 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -296,7 +296,7 @@ static bool need_preempt(const struct intel_engine_cs *engine,
 	const struct i915_sched_engine *se = &engine->sched;
 	int last_prio;
 
-	if (!intel_engine_has_semaphores(engine))
+	if (!i915_sched_use_busywait(se))
 		return false;
 
 	/*
@@ -2850,6 +2850,10 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)
 	    intel_engine_has_preemption(engine))
 		__set_bit(I915_SCHED_HAS_TIMESLICES_BIT,
 			  &engine->sched.flags);
+
+	if (intel_engine_has_preemption(engine))
+		__set_bit(I915_SCHED_USE_BUSYWAIT_BIT,
+			  &engine->sched.flags);
 }
 
 static void logical_ring_default_irqs(struct intel_engine_cs *engine)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 23259a0f520e..6729574a3ddf 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -679,9 +679,11 @@ static int live_lrc_gpr(void *arg)
 		if (err)
 			goto err;
 
-		err = __live_lrc_gpr(engine, scratch, true);
-		if (err)
-			goto err;
+		if (intel_engine_has_preemption(engine)) {
+			err = __live_lrc_gpr(engine, scratch, true);
+			if (err)
+				goto err;
+		}
 
 err:
 		st_engine_heartbeat_enable(engine);
diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h
index 673fa4adf2bc..f001865d4c9b 100644
--- a/drivers/gpu/drm/i915/i915_scheduler_types.h
+++ b/drivers/gpu/drm/i915/i915_scheduler_types.h
@@ -20,6 +20,7 @@ enum {
 	I915_SCHED_ACTIVE_BIT = 0,
 	I915_SCHED_HAS_TIMESLICES_BIT,
 	I915_SCHED_NEEDS_BREADCRUMB_BIT,
+	I915_SCHED_USE_BUSYWAIT_BIT,
 };
 
 /* Inter-engine scheduling delegation */
@@ -180,4 +181,10 @@ i915_sched_needs_breadcrumb_tasklet(const struct i915_sched_engine *se)
 	return test_bit(I915_SCHED_NEEDS_BREADCRUMB_BIT, &se->flags);
 }
 
+static inline bool
+i915_sched_use_busywait(const struct i915_sched_engine *se)
+{
+	return test_bit(I915_SCHED_USE_BUSYWAIT_BIT, &se->flags);
+}
+
 #endif /* _I915_SCHEDULER_TYPES_H_ */
-- 
2.20.1