[PATCH 29/57] drm/i915: Move scheduler flags
Chris Wilson
chris at chris-wilson.co.uk
Sun Jan 31 14:08:04 UTC 2021
Start extracting the scheduling flags from the engine.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/intel_engine.h | 6 ++++++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 21 +++++++------------
.../drm/i915/gt/intel_execlists_submission.c | 6 +++++-
drivers/gpu/drm/i915/i915_request.c | 6 +++---
drivers/gpu/drm/i915/i915_request.h | 6 ++++++
drivers/gpu/drm/i915/i915_scheduler.c | 2 +-
drivers/gpu/drm/i915/i915_scheduler_types.h | 11 ++++++++++
7 files changed, 39 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index e6b511b5363c..bb19ecf6b00c 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -255,6 +255,12 @@ intel_engine_has_heartbeat(const struct intel_engine_cs *engine)
return READ_ONCE(engine->props.heartbeat_interval_ms);
}
+static inline bool
+intel_engine_has_scheduler(struct intel_engine_cs *engine)
+{
+ return i915_sched_is_active(intel_engine_get_scheduler(engine));
+}
+
static inline void
intel_engine_kick_scheduler(struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 863f4a1ad49f..834be56552a7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -440,14 +440,13 @@ struct intel_engine_cs {
#define I915_ENGINE_USING_CMD_PARSER BIT(0)
#define I915_ENGINE_SUPPORTS_STATS BIT(1)
-#define I915_ENGINE_HAS_SCHEDULER BIT(2)
-#define I915_ENGINE_HAS_PREEMPTION BIT(3)
-#define I915_ENGINE_HAS_SEMAPHORES BIT(4)
-#define I915_ENGINE_HAS_TIMESLICES BIT(5)
-#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(6)
-#define I915_ENGINE_IS_VIRTUAL BIT(7)
-#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(8)
-#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(9)
+#define I915_ENGINE_HAS_PREEMPTION BIT(2)
+#define I915_ENGINE_HAS_SEMAPHORES BIT(3)
+#define I915_ENGINE_HAS_TIMESLICES BIT(4)
+#define I915_ENGINE_NEEDS_BREADCRUMB_TASKLET BIT(5)
+#define I915_ENGINE_IS_VIRTUAL BIT(6)
+#define I915_ENGINE_HAS_RELATIVE_MMIO BIT(7)
+#define I915_ENGINE_REQUIRES_CMD_PARSER BIT(8)
unsigned int flags;
/*
@@ -530,12 +529,6 @@ intel_engine_supports_stats(const struct intel_engine_cs *engine)
return engine->flags & I915_ENGINE_SUPPORTS_STATS;
}
-static inline bool
-intel_engine_has_scheduler(const struct intel_engine_cs *engine)
-{
- return engine->flags & I915_ENGINE_HAS_SCHEDULER;
-}
-
static inline bool
intel_engine_has_preemption(const struct intel_engine_cs *engine)
{
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index f4aeb3fcc184..ebd64fe5ffe0 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -2859,6 +2859,7 @@ static void execlists_set_default_submission(struct intel_engine_cs *engine)
{
engine->sched.submit_request = i915_request_enqueue;
engine->sched.tasklet.callback = execlists_submission_tasklet;
+ __set_bit(I915_SCHED_ACTIVE_BIT, &engine->sched.flags);
}
static void execlists_shutdown(struct intel_engine_cs *engine)
@@ -2917,7 +2918,6 @@ logical_ring_default_vfuncs(struct intel_engine_cs *engine)
*/
}
- engine->flags |= I915_ENGINE_HAS_SCHEDULER;
engine->flags |= I915_ENGINE_SUPPORTS_STATS;
if (!intel_vgpu_active(engine->i915)) {
engine->flags |= I915_ENGINE_HAS_SEMAPHORES;
@@ -3391,6 +3391,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
unsigned int count)
{
struct virtual_engine *ve;
+ unsigned long sched;
unsigned int n;
int err;
@@ -3451,6 +3452,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
goto err_put;
}
+ sched = ~0U;
for (n = 0; n < count; n++) {
struct intel_engine_cs *sibling = siblings[n];
@@ -3480,6 +3482,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
ve->siblings[ve->num_siblings++] = sibling;
ve->base.mask |= sibling->mask;
+ sched &= sibling->sched.flags;
/*
* All physical engines must be compatible for their emission
@@ -3521,6 +3524,7 @@ intel_execlists_create_virtual(struct intel_engine_cs **siblings,
ve->base.name,
ve->base.mask,
ENGINE_VIRTUAL);
+ ve->base.sched.flags = sched;
virtual_engine_initial_hint(ve);
return &ve->context;
diff --git a/drivers/gpu/drm/i915/i915_request.c b/drivers/gpu/drm/i915/i915_request.c
index 69547cb8065a..c3bf618deee6 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -1149,7 +1149,7 @@ __i915_request_await_execution(struct i915_request *to,
}
/* Couple the dependency tree for PI on this exposed to->fence */
- if (intel_engine_has_scheduler(to->engine)) {
+ if (i915_request_use_scheduler(to)) {
err = i915_sched_node_add_dependency(&to->sched,
&from->sched,
I915_DEPENDENCY_WEAK);
@@ -1290,7 +1290,7 @@ i915_request_await_request(struct i915_request *to, struct i915_request *from)
return 0;
}
- if (intel_engine_has_scheduler(to->engine)) {
+ if (i915_request_use_scheduler(to)) {
ret = i915_sched_node_add_dependency(&to->sched,
&from->sched,
I915_DEPENDENCY_EXTERNAL);
@@ -1477,7 +1477,7 @@ __i915_request_add_to_timeline(struct i915_request *rq)
__i915_sw_fence_await_dma_fence(&rq->submit,
&prev->fence,
&rq->dmaq);
- if (intel_engine_has_scheduler(rq->engine))
+ if (i915_request_use_scheduler(rq))
__i915_sched_node_add_dependency(&rq->sched,
&prev->sched,
&rq->dep,
diff --git a/drivers/gpu/drm/i915/i915_request.h b/drivers/gpu/drm/i915/i915_request.h
index a595e344bfe2..a44f5dae1a2e 100644
--- a/drivers/gpu/drm/i915/i915_request.h
+++ b/drivers/gpu/drm/i915/i915_request.h
@@ -638,4 +638,10 @@ i915_request_use_semaphores(const struct i915_request *rq)
return intel_engine_has_semaphores(rq->engine);
}
+static inline bool
+i915_request_use_scheduler(const struct i915_request *rq)
+{
+ return i915_sched_is_active(i915_request_get_scheduler(rq));
+}
+
#endif /* I915_REQUEST_H */
diff --git a/drivers/gpu/drm/i915/i915_scheduler.c b/drivers/gpu/drm/i915/i915_scheduler.c
index a91456d80e31..1c34c82ee753 100644
--- a/drivers/gpu/drm/i915/i915_scheduler.c
+++ b/drivers/gpu/drm/i915/i915_scheduler.c
@@ -549,7 +549,7 @@ void i915_request_set_priority(struct i915_request *rq, int prio)
if (__i915_request_is_complete(rq))
goto unlock;
- if (!intel_engine_has_scheduler(engine)) {
+ if (!i915_sched_is_active(&engine->sched)) {
rq->sched.attr.priority = prio;
goto unlock;
}
diff --git a/drivers/gpu/drm/i915/i915_scheduler_types.h b/drivers/gpu/drm/i915/i915_scheduler_types.h
index f22637208e7a..46207f41a4d0 100644
--- a/drivers/gpu/drm/i915/i915_scheduler_types.h
+++ b/drivers/gpu/drm/i915/i915_scheduler_types.h
@@ -16,6 +16,10 @@
struct drm_printer;
struct i915_request;
+enum {
+ I915_SCHED_ACTIVE_BIT = 0,
+};
+
/* Inter-engine scheduling delegation */
struct i915_sched_ipi {
struct i915_request *list;
@@ -25,6 +29,7 @@ struct i915_sched_ipi {
struct i915_sched_engine {
spinlock_t lock; /* protects the scheduling lists and queue */
+ unsigned long flags;
unsigned long mask; /* available scheduling channels */
/*
@@ -165,4 +170,10 @@ struct i915_dependency {
&(rq__)->sched.signalers_list, \
signal_link)
+static inline bool
+i915_sched_is_active(const struct i915_sched_engine *se)
+{
+ return test_bit(I915_SCHED_ACTIVE_BIT, &se->flags);
+}
+
#endif /* _I915_SCHEDULER_TYPES_H_ */
--
2.20.1
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