[PATCH i-g-t 43/52] WIP: tests/gem_exec_schedule at deep - NOT WORKING
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Thu Jul 1 12:37:23 UTC 2021
---
tests/i915/gem_exec_schedule.c | 85 +++++++++++++++++++++++++++++++---
1 file changed, 78 insertions(+), 7 deletions(-)
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 624e742be..66758dabb 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -198,11 +198,12 @@ static void store_dword_plug(int fd, uint32_t ctx, unsigned ring,
}
static void store_dword_plug2(int fd, uint64_t ahnd, uint32_t ctx, unsigned ring,
- uint32_t target, uint32_t offset, uint32_t value,
+ uint32_t target, uint64_t target_offset,
+ uint32_t offset, uint32_t value,
uint32_t cork, unsigned write_domain)
{
gem_close(fd, __store_dword(fd, ahnd, ctx, ring,
- target, 123123, offset, value,
+ target, target_offset, offset, value,
cork, -1, write_domain));
}
@@ -2012,26 +2013,43 @@ static void deep(int fd, unsigned ring)
unsigned int nreq;
uint32_t plug;
uint32_t result, dep[XS];
+ uint64_t result_offset, bb_offset, dep_offset[XS], plug_offset;
uint32_t read_buf[size / sizeof(uint32_t)];
uint32_t expected = 0;
uint32_t *ctx;
+ uint64_t ahnd = get_simple_l2h_ahnd(fd, 0);
int dep_nreq;
int n;
+#undef MAX_CONTEXTS
+#define MAX_CONTEXTS 32
+
ctx = malloc(sizeof(*ctx) * MAX_CONTEXTS);
for (n = 0; n < MAX_CONTEXTS; n++) {
ctx[n] = gem_context_clone_with_engines(fd, 0);
}
nreq = gem_submission_measure(fd, ring) / (3 * XS) * MAX_CONTEXTS;
+ nreq = 32;
if (nreq > max_req)
nreq = max_req;
igt_info("Using %d requests (prio range %d)\n", nreq, max_req);
+ /*
+ * We're going to use same offsets on all contexts. Only exception is bb
+ * which we're assigning consequtives offsets to keep pipeline busy.
+ */
result = gem_create(fd, size);
- for (int m = 0; m < XS; m ++)
+ result_offset = get_offset(ahnd, result, size, 0);
+ igt_info("Result offset: %llx\n", (long long) result_offset);
+ for (int m = 0; m < XS; m ++) {
dep[m] = gem_create(fd, size);
+ dep_offset[m] = get_offset(ahnd, dep[m], size, 0);
+ igt_info("Dep[%d] offset: %llx\n", m,
+ (long long) dep_offset[m]);
+ }
+ igt_info("A1\n");
/* Bind all surfaces and contexts before starting the timeout. */
{
struct drm_i915_gem_exec_object2 obj[XS + 2];
@@ -2039,26 +2057,44 @@ static void deep(int fd, unsigned ring)
const uint32_t bbe = MI_BATCH_BUFFER_END;
memset(obj, 0, sizeof(obj));
- for (n = 0; n < XS; n++)
+ for (n = 0; n < XS; n++) {
obj[n].handle = dep[n];
+ if (ahnd) {
+ obj[n].offset = dep_offset[n];
+ obj[n].flags |= EXEC_OBJECT_PINNED;
+ }
+ }
obj[XS].handle = result;
obj[XS+1].handle = gem_create(fd, 4096);
gem_write(fd, obj[XS+1].handle, 0, &bbe, sizeof(bbe));
+ if (ahnd) {
+ obj[XS].offset = result_offset;
+ obj[XS].flags |= EXEC_OBJECT_PINNED;
+ obj[XS+1].offset = get_offset(ahnd, obj[XS+1].handle,
+ 4096, 0);
+ obj[XS+1].flags |= EXEC_OBJECT_PINNED;
+ }
+ igt_info("BB offset: %llx\n", (long long) obj[XS+1].offset);
+
memset(&execbuf, 0, sizeof(execbuf));
execbuf.buffers_ptr = to_user_pointer(obj);
execbuf.buffer_count = XS + 2;
execbuf.flags = ring;
for (n = 0; n < MAX_CONTEXTS; n++) {
+ igt_info("B%d\n", n);
execbuf.rsvd1 = ctx[n];
gem_execbuf(fd, &execbuf);
}
+ put_offset(ahnd, obj[XS+1].handle);
gem_close(fd, obj[XS+1].handle);
gem_sync(fd, result);
}
plug = igt_cork_plug(&cork, fd);
+ plug_offset = get_offset(ahnd, plug, 4096, 0); /* 4K is enough */
+ igt_info("A2\n");
/* Create a deep dependency chain, with a few branches */
for (n = 0; n < nreq && igt_seconds_elapsed(&tv) < 2; n++) {
const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
@@ -2107,7 +2143,38 @@ static void deep(int fd, unsigned ring)
for (int m = 0; m < XS; m++) {
obj[1].handle = dep[m];
reloc.target_handle = obj[1].handle;
+
+ igt_info("z\n");
+
+ if (ahnd && gen >= 8) {
+ // gem_close(fd, obj[2].handle);
+ obj[2].handle = gem_create(fd, 4096);
+ bb_offset = get_offset(ahnd, obj[2].handle, 4096, 0);
+ i = 1;
+ batch[i++] = dep_offset[m] + reloc.delta;
+ batch[i++] = (dep_offset[m] + reloc.delta) >> 32;
+ igt_info("z2\n");
+ gem_write(fd, obj[2].handle, 0, batch, sizeof(batch));
+ igt_info("z3\n");
+
+ obj[0].offset = plug_offset;
+ obj[0].flags |= EXEC_OBJECT_PINNED;
+ obj[1].offset = dep_offset[m];
+ obj[1].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE;
+ obj[2].offset = bb_offset;
+ obj[2].flags |= EXEC_OBJECT_PINNED;
+ obj[2].relocation_count = 0;
+ }
+
+ igt_info("a ctx[%u] obj[0].offset: %llx, handle: %u || ",
+ (uint32_t) eb.rsvd1, obj[0].offset, obj[0].handle);
+ igt_info("obj[1].offset: %llx, handle: %u || ", obj[1].offset, obj[1].handle);
+ igt_info("obj[2].offset: %llx, handle: %u\n", obj[2].offset, obj[2].handle);
gem_execbuf(fd, &eb);
+ igt_info("b ctx[%u] obj[0].offset: %llx, handle: %u || ",
+ (uint32_t) eb.rsvd1, obj[0].offset, obj[0].handle);
+ igt_info("obj[1].offset: %llx, handle: %u || ", obj[1].offset, obj[1].handle);
+ igt_info("obj[2].offset: %llx, handle: %u\n", obj[2].offset, obj[2].handle);
}
gem_close(fd, obj[2].handle);
}
@@ -2120,15 +2187,19 @@ static void deep(int fd, unsigned ring)
gem_context_set_priority(fd, context, MAX_PRIO - nreq + n);
for (int m = 0; m < XS; m++) {
- store_dword_plug(fd, context, ring, result, 4*n, context, dep[m], 0);
- store_dword(fd, context, ring, result, 4*m, context, I915_GEM_DOMAIN_INSTRUCTION);
+ store_dword_plug2(fd, ahnd, context, ring,
+ result, result_offset,
+ 4*n, context, dep[m], 0);
+ store_dword2(fd, ahnd, context, ring,
+ result, result_offset,
+ 4*m, context, I915_GEM_DOMAIN_INSTRUCTION);
}
expected = context;
}
igt_info("Second deptree: %d requests [%.3fs]\n",
n * XS, 1e-9*igt_nsec_elapsed(&tv));
- unplug_show_queue(fd, &cork, ring);
+ unplug_show_queue2(fd, &cork, ring);
gem_close(fd, plug);
igt_require(expected); /* too slow */
--
2.26.0
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