[PATCH i-g-t 52/58] WIP: tests/gem_exec_schedule

Zbigniew Kempczyński zbigniew.kempczynski at intel.com
Tue Jul 6 07:09:29 UTC 2021


---
 tests/i915/gem_exec_schedule.c | 116 ++++++++++++++++++++++++---------
 1 file changed, 87 insertions(+), 29 deletions(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 2eec34128..d2b34ab02 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -179,11 +179,12 @@ static void store_dword(int fd, uint32_t ctx, unsigned ring,
 }
 
 static void store_dword2(int fd, uint64_t ahnd, uint32_t ctx, unsigned ring,
-			uint32_t target, uint32_t offset, uint32_t value,
+			uint32_t target, uint64_t target_offset,
+			 uint32_t offset, uint32_t value,
 			unsigned write_domain)
 {
 	gem_close(fd, __store_dword(fd, ahnd, ctx, ring,
-				    target, 123123, offset, value,
+				    target, target_offset, offset, value,
 				    0, -1, write_domain));
 }
 
@@ -476,6 +477,7 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	unsigned engine;
 	uint32_t scratch;
 	uint32_t result[2 * ncpus];
+	uint64_t ahnd = get_reloc_ahnd(fd, 0), scratch_offset;
 
 	nengine = 0;
 	if (ring == ALL_ENGINES) {
@@ -488,6 +490,7 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 	igt_require(nengine);
 
 	scratch = gem_create(fd, 4096);
+	scratch_offset = get_offset(ahnd, scratch, 4096, 0);
 	igt_fork(child, ncpus) {
 		unsigned long count = 0;
 		uint32_t ctx;
@@ -495,6 +498,9 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 		hars_petruska_f54_1_random_perturb(child);
 
 		ctx = gem_context_clone_with_engines(fd, 0);
+		ahnd = get_reloc_ahnd(fd, ctx);
+		get_offset(ahnd, scratch, 4096, 0); /* skip scratch offset */
+
 		igt_until_timeout(timeout) {
 			int prio;
 
@@ -502,20 +508,22 @@ static void smoketest(int fd, unsigned ring, unsigned timeout)
 			gem_context_set_priority(fd, ctx, prio);
 
 			engine = engines[hars_petruska_f54_1_random_unsafe_max(nengine)];
-			store_dword(fd, ctx, engine, scratch,
+			store_dword2(fd, ahnd, ctx, engine, scratch, scratch_offset,
 				    8*child + 0, ~child,
 				    0);
 			for (unsigned int step = 0; step < 8; step++)
-				store_dword(fd, ctx, engine, scratch,
+				store_dword2(fd, ahnd, ctx, engine, scratch, scratch_offset,
 					    8*child + 4, count++,
 					    0);
 		}
 		gem_context_destroy(fd, ctx);
+		put_ahnd(ahnd);
 	}
 	igt_waitchildren();
 
 	__sync_read_u32_count(fd, scratch, result, sizeof(result));
 	gem_close(fd, scratch);
+	put_ahnd(ahnd);
 
 	for (unsigned n = 0; n < ncpus; n++) {
 		igt_assert_eq_u32(result[2 * n], ~n);
@@ -1065,6 +1073,7 @@ static void semaphore_resolve(int i915, unsigned long flags)
 	const struct intel_execution_engine2 *e;
 	const uint32_t SEMAPHORE_ADDR = 64 << 10;
 	uint32_t semaphore, outer, inner, *sema;
+	uint64_t ahnd = get_reloc_ahnd(i915, 0);
 
 	/*
 	 * Userspace may submit batches that wait upon unresolved
@@ -1095,7 +1104,8 @@ static void semaphore_resolve(int i915, unsigned long flags)
 		if (!gem_class_can_store_dword(i915, e->class))
 			continue;
 
-		spin = __igt_spin_new(i915, .engine = e->flags, .flags = flags);
+		spin = __igt_spin_new(i915, .ahnd = ahnd,
+				      .engine = e->flags, .flags = flags);
 		igt_spin_end(spin); /* we just want its address for later */
 		gem_sync(i915, spin->handle);
 		igt_spin_reset(spin);
@@ -1187,6 +1197,7 @@ static void semaphore_resolve(int i915, unsigned long flags)
 
 	gem_context_destroy(i915, inner);
 	gem_context_destroy(i915, outer);
+	put_ahnd(ahnd);
 }
 
 static void semaphore_noskip(int i915, unsigned long flags)
@@ -1194,6 +1205,7 @@ static void semaphore_noskip(int i915, unsigned long flags)
 	const unsigned int gen = intel_gen(intel_get_drm_devid(i915));
 	const struct intel_execution_engine2 *outer, *inner;
 	uint32_t ctx;
+	uint64_t ahnd = get_reloc_ahnd(i915, 0);
 
 	igt_require(gen >= 6); /* MI_STORE_DWORD_IMM convenience */
 
@@ -1210,9 +1222,11 @@ static void semaphore_noskip(int i915, unsigned long flags)
 		    !gem_class_can_store_dword(i915, inner->class))
 			continue;
 
-		chain = __igt_spin_new(i915, .engine = outer->flags, .flags = flags);
+		chain = __igt_spin_new(i915, .ahnd = ahnd,
+				       .engine = outer->flags, .flags = flags);
 
-		spin = __igt_spin_new(i915, .engine = inner->flags, .flags = flags);
+		spin = __igt_spin_new(i915, .ahnd = ahnd,
+				      .engine = inner->flags, .flags = flags);
 		igt_spin_end(spin); /* we just want its address for later */
 		gem_sync(i915, spin->handle);
 		igt_spin_reset(spin);
@@ -1270,6 +1284,7 @@ static void semaphore_noskip(int i915, unsigned long flags)
 	}
 
 	gem_context_destroy(i915, ctx);
+	put_ahnd(ahnd);
 }
 
 static void
@@ -1397,6 +1412,7 @@ static void reorder(int fd, unsigned ring, unsigned flags)
 	uint32_t result;
 	uint32_t ctx[2];
 	int fence;
+	uint64_t ahnd = get_reloc_ahnd(fd, 0), scratch_offset;
 
 	ctx[LO] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
@@ -1405,15 +1421,18 @@ static void reorder(int fd, unsigned ring, unsigned flags)
 	gem_context_set_priority(fd, ctx[HI], flags & EQUAL ? MIN_PRIO : 0);
 
 	scratch = gem_create(fd, 4096);
+	scratch_offset = get_offset(ahnd, scratch, 4096, 0);
 	fence = igt_cork_plug(&cork, fd);
 
 	/* We expect the high priority context to be executed first, and
 	 * so the final result will be value from the low priority context.
 	 */
-	store_dword_fenced(fd, ctx[LO], ring, scratch, 0, ctx[LO], fence, 0);
-	store_dword_fenced(fd, ctx[HI], ring, scratch, 0, ctx[HI], fence, 0);
+	store_dword_fenced2(fd, ahnd, ctx[LO], ring, scratch, scratch_offset,
+			    0, ctx[LO], fence, 0);
+	store_dword_fenced2(fd, ahnd, ctx[HI], ring, scratch, scratch_offset,
+			    0, ctx[HI], fence, 0);
 
-	unplug_show_queue(fd, &cork, ring);
+	unplug_show_queue2(fd, &cork, ring);
 	close(fence);
 
 	gem_context_destroy(fd, ctx[LO]);
@@ -1421,6 +1440,7 @@ static void reorder(int fd, unsigned ring, unsigned flags)
 
 	result =  __sync_read_u32(fd, scratch, 0);
 	gem_close(fd, scratch);
+	put_ahnd(ahnd);
 
 	if (flags & EQUAL) /* equal priority, result will be fifo */
 		igt_assert_eq_u32(result, ctx[HI]);
@@ -1435,6 +1455,7 @@ static void promotion(int fd, unsigned ring)
 	uint32_t result_read, dep_read;
 	uint32_t ctx[3];
 	int fence;
+	uint64_t ahnd = get_reloc_ahnd(fd, 0), result_offset, dep_offset;
 
 	ctx[LO] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
@@ -1446,7 +1467,10 @@ static void promotion(int fd, unsigned ring)
 	gem_context_set_priority(fd, ctx[NOISE], MIN_PRIO/2);
 
 	result = gem_create(fd, 4096);
+	result_offset = get_offset(ahnd, result, 4096, 0);
+	get_offset(ahnd, 1000, 4096, 0);
 	dep = gem_create(fd, 4096);
+	dep_offset = get_offset(ahnd, dep, 4096, 0);
 
 	fence = igt_cork_plug(&cork, fd);
 
@@ -1455,16 +1479,22 @@ static void promotion(int fd, unsigned ring)
 	 * fifo would be NOISE, LO, HI.
 	 * strict priority would be  HI, NOISE, LO
 	 */
-	store_dword_fenced(fd, ctx[NOISE], ring, result, 0, ctx[NOISE], fence, 0);
-	store_dword_fenced(fd, ctx[LO], ring, result, 0, ctx[LO], fence, 0);
+	store_dword_fenced2(fd, ahnd, ctx[NOISE], ring, result, result_offset,
+			    0, ctx[NOISE], fence, 0);
+	store_dword_fenced2(fd, ahnd, ctx[LO], ring, result, result_offset,
+			    0, ctx[LO], fence, 0);
 
 	/* link LO <-> HI via a dependency on another buffer */
-	store_dword(fd, ctx[LO], ring, dep, 0, ctx[LO], I915_GEM_DOMAIN_INSTRUCTION);
-	store_dword(fd, ctx[HI], ring, dep, 0, ctx[HI], 0);
+	store_dword2(fd, ahnd, ctx[LO], ring, dep, dep_offset,
+		     0, ctx[LO], I915_GEM_DOMAIN_INSTRUCTION);
 
-	store_dword(fd, ctx[HI], ring, result, 0, ctx[HI], 0);
+	store_dword2(fd, ahnd, ctx[HI], ring, dep, dep_offset,
+		     0, ctx[HI], 0);
 
-	unplug_show_queue(fd, &cork, ring);
+	store_dword2(fd, ahnd, ctx[HI], ring, result, result_offset,
+		     0, ctx[HI], 0);
+
+	unplug_show_queue2(fd, &cork, ring);
 	close(fence);
 
 	gem_context_destroy(fd, ctx[NOISE]);
@@ -1477,6 +1507,8 @@ static void promotion(int fd, unsigned ring)
 	result_read = __sync_read_u32(fd, result, 0);
 	gem_close(fd, result);
 
+	put_ahnd(ahnd);
+
 	igt_assert_eq_u32(dep_read, ctx[HI]);
 	igt_assert_eq_u32(result_read, ctx[NOISE]);
 }
@@ -1499,12 +1531,15 @@ static void preempt(int fd, const struct intel_execution_engine2 *e, unsigned fl
 	igt_spin_t *spin[MAX_ELSP_QLEN];
 	uint32_t ctx[2];
 	igt_hang_t hang;
+	uint64_t ahnd = get_reloc_ahnd(fd, 0), ahnd_lo;
+	uint64_t result_offset = get_offset(ahnd, result, 4096, 0);
 
 	/* Set a fast timeout to speed the test up (if available) */
 	set_preempt_timeout(fd, e, 150);
 
 	ctx[LO] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
+	ahnd_lo = get_reloc_ahnd(fd, ctx[LO]);
 
 	ctx[HI] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
@@ -1514,17 +1549,22 @@ static void preempt(int fd, const struct intel_execution_engine2 *e, unsigned fl
 
 	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
 		if (flags & NEW_CTX) {
+			put_ahnd(ahnd_lo);
 			gem_context_destroy(fd, ctx[LO]);
 			ctx[LO] = gem_context_clone_with_engines(fd, 0);
 			gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
+			ahnd_lo = get_reloc_ahnd(fd, ctx[LO]);
 		}
+
 		spin[n] = __igt_spin_new(fd,
+					 .ahnd = ahnd_lo,
 					 .ctx_id = ctx[LO],
 					 .engine = e->flags,
 					 .flags = flags & USERPTR ? IGT_SPIN_USERPTR : 0);
 		igt_debug("spin[%d].handle=%d\n", n, spin[n]->handle);
 
-		store_dword(fd, ctx[HI], e->flags, result, 0, n + 1, I915_GEM_DOMAIN_RENDER);
+		store_dword2(fd, ahnd, ctx[HI], e->flags, result, result_offset,
+			     0, n + 1, I915_GEM_DOMAIN_RENDER);
 
 		result_read = __sync_read_u32(fd, result, 0);
 		igt_assert_eq_u32(result_read, n + 1);
@@ -1539,6 +1579,8 @@ static void preempt(int fd, const struct intel_execution_engine2 *e, unsigned fl
 
 	gem_context_destroy(fd, ctx[LO]);
 	gem_context_destroy(fd, ctx[HI]);
+	put_ahnd(ahnd);
+	put_ahnd(ahnd_lo);
 
 	gem_close(fd, result);
 }
@@ -1546,7 +1588,8 @@ static void preempt(int fd, const struct intel_execution_engine2 *e, unsigned fl
 #define CHAIN 0x1
 #define CONTEXTS 0x2
 
-static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
+static igt_spin_t *__noise(int fd, uint64_t ahnd, uint32_t ctx,
+			   int prio, igt_spin_t *spin)
 {
 	const struct intel_execution_engine2 *e;
 
@@ -1555,6 +1598,7 @@ static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
 	__for_each_physical_engine(fd, e) {
 		if (spin == NULL) {
 			spin = __igt_spin_new(fd,
+					      .ahnd = ahnd,
 					      .ctx_id = ctx,
 					      .engine = e->flags);
 		} else {
@@ -1572,6 +1616,7 @@ static igt_spin_t *__noise(int fd, uint32_t ctx, int prio, igt_spin_t *spin)
 }
 
 static void __preempt_other(int fd,
+			    uint64_t *ahnd,
 			    uint32_t *ctx,
 			    unsigned int target, unsigned int primary,
 			    unsigned flags)
@@ -1580,24 +1625,27 @@ static void __preempt_other(int fd,
 	uint32_t result = gem_create(fd, 4096);
 	uint32_t result_read[4096 / sizeof(uint32_t)];
 	unsigned int n, i;
+	uint64_t result_offset_lo = get_offset(ahnd[LO], result, 4096, 0);
+	uint64_t result_offset_hi = get_offset(ahnd[HI], result, 4096, 0);
 
 	n = 0;
-	store_dword(fd, ctx[LO], primary,
-		    result, (n + 1)*sizeof(uint32_t), n + 1,
+	store_dword2(fd, ahnd[LO], ctx[LO], primary,
+		    result, result_offset_lo, (n + 1)*sizeof(uint32_t), n + 1,
 		    I915_GEM_DOMAIN_RENDER);
 	n++;
 
 	if (flags & CHAIN) {
 		__for_each_physical_engine(fd, e) {
-			store_dword(fd, ctx[LO], e->flags,
-				    result, (n + 1)*sizeof(uint32_t), n + 1,
+			store_dword2(fd, ahnd[LO], ctx[LO], e->flags,
+				    result, result_offset_lo,
+				     (n + 1)*sizeof(uint32_t), n + 1,
 				    I915_GEM_DOMAIN_RENDER);
 			n++;
 		}
 	}
 
-	store_dword(fd, ctx[HI], target,
-		    result, (n + 1)*sizeof(uint32_t), n + 1,
+	store_dword2(fd, ahnd[HI], ctx[HI], target,
+		    result, result_offset_hi, (n + 1)*sizeof(uint32_t), n + 1,
 		    I915_GEM_DOMAIN_RENDER);
 
 	igt_debugfs_dump(fd, "i915_engine_info");
@@ -1617,6 +1665,7 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
 	const struct intel_execution_engine2 *e;
 	igt_spin_t *spin = NULL;
 	uint32_t ctx[3];
+	uint64_t ahnd[3];
 
 	/* On each engine, insert
 	 * [NOISE] spinner,
@@ -1630,16 +1679,19 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
 
 	ctx[LO] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[LO], MIN_PRIO);
+	ahnd[LO] = get_reloc_ahnd(fd, ctx[LO]);
 
 	ctx[NOISE] = gem_context_clone_with_engines(fd, 0);
-	spin = __noise(fd, ctx[NOISE], 0, NULL);
+	ahnd[NOISE] = get_reloc_ahnd(fd, ctx[NOISE]);
+	spin = __noise(fd, ahnd[NOISE], ctx[NOISE], 0, NULL);
 
 	ctx[HI] = gem_context_clone_with_engines(fd, 0);
 	gem_context_set_priority(fd, ctx[HI], MAX_PRIO);
+	ahnd[HI] = get_reloc_ahnd(fd, ctx[HI]);
 
 	__for_each_physical_engine(fd, e) {
 		igt_debug("Primary engine: %s\n", e->name);
-		__preempt_other(fd, ctx, ring, e->flags, flags);
+		__preempt_other(fd, ahnd, ctx, ring, e->flags, flags);
 
 	}
 
@@ -1649,6 +1701,9 @@ static void preempt_other(int fd, unsigned ring, unsigned int flags)
 	gem_context_destroy(fd, ctx[LO]);
 	gem_context_destroy(fd, ctx[NOISE]);
 	gem_context_destroy(fd, ctx[HI]);
+	put_ahnd(ahnd[LO]);
+	put_ahnd(ahnd[NOISE]);
+	put_ahnd(ahnd[HI]);
 }
 
 static void __preempt_queue(int fd,
@@ -1672,7 +1727,7 @@ static void __preempt_queue(int fd,
 			gem_context_destroy(fd, ctx[NOISE]);
 			ctx[NOISE] = gem_context_clone_with_engines(fd, 0);
 		}
-		above = __noise(fd, ctx[NOISE], prio--, above);
+		//above = __noise(fd, ctx[NOISE], prio--, above);
 	}
 
 	gem_context_set_priority(fd, ctx[HI], prio--);
@@ -1682,7 +1737,7 @@ static void __preempt_queue(int fd,
 			gem_context_destroy(fd, ctx[NOISE]);
 			ctx[NOISE] = gem_context_clone_with_engines(fd, 0);
 		}
-		below = __noise(fd, ctx[NOISE], prio--, below);
+		//below = __noise(fd, ctx[NOISE], prio--, below);
 	}
 
 	gem_context_set_priority(fd, ctx[LO], prio--);
@@ -3062,8 +3117,11 @@ igt_main
 		igt_subtest("u-semaphore-noskip")
 			semaphore_noskip(fd, IGT_SPIN_USERPTR);
 
-		igt_subtest("smoketest-all")
+		igt_subtest("smoketest-all") {
+			intel_allocator_multiprocess_start();
 			smoketest(fd, ALL_ENGINES, 30);
+			intel_allocator_multiprocess_stop();
+		}
 
 		test_each_engine_store("in-order", fd, e)
 			reorder(fd, e->flags, EQUAL);
-- 
2.26.0



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