[PATCH i-g-t 26/29] WIP/FIXME: tests/gem_ctx_isolation

Zbigniew Kempczyński zbigniew.kempczynski at intel.com
Mon Jun 14 04:58:01 UTC 2021


Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski at intel.com>
---
 tests/i915/gem_ctx_isolation.c | 91 ++++++++++++++++++++++++----------
 1 file changed, 66 insertions(+), 25 deletions(-)

diff --git a/tests/i915/gem_ctx_isolation.c b/tests/i915/gem_ctx_isolation.c
index ff5d3718f..cadd2f5c9 100644
--- a/tests/i915/gem_ctx_isolation.c
+++ b/tests/i915/gem_ctx_isolation.c
@@ -280,7 +280,8 @@ static void tmpl_regs(int fd,
 static uint32_t read_regs(int fd,
 			  uint32_t ctx,
 			  const struct intel_execution_engine2 *e,
-			  unsigned int flags)
+			  unsigned int flags,
+			  uint64_t ahnd)
 {
 	const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
 	const unsigned int gen_bit = 1 << gen;
@@ -305,6 +306,13 @@ static uint32_t read_regs(int fd,
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = gem_create(fd, regs_size);
 	obj[1].handle = gem_create(fd, batch_size);
+	if (ahnd) {
+		obj[0].offset = get_offset(ahnd, obj[0].handle, regs_size, 0);
+		obj[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE;
+		obj[1].offset = get_offset(ahnd, obj[1].handle, batch_size, 0);
+		obj[1].flags |= EXEC_OBJECT_PINNED;
+	}
+
 	obj[1].relocs_ptr = to_user_pointer(reloc);
 
 	b = batch = gem_mmap__cpu(fd, obj[1].handle, 0, batch_size, PROT_WRITE);
@@ -335,14 +343,14 @@ static uint32_t read_regs(int fd,
 			reloc[n].delta = offset;
 			reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
 			reloc[n].write_domain = I915_GEM_DOMAIN_RENDER;
-			*b++ = offset;
+			*b++ = obj[0].offset + offset;
 			if (r64b)
-				*b++ = 0;
+				*b++ = obj[0].offset >> 32;
 			n++;
 		}
 	}
 
-	obj[1].relocation_count = n;
+	obj[1].relocation_count = !ahnd ? n : 0;
 	*b++ = MI_BATCH_BUFFER_END;
 	munmap(batch, batch_size);
 
@@ -354,6 +362,8 @@ static uint32_t read_regs(int fd,
 	gem_execbuf(fd, &execbuf);
 	gem_close(fd, obj[1].handle);
 	free(reloc);
+	if (ahnd)
+		put_offset(ahnd, obj[1].handle);
 
 	return obj[0].handle;
 }
@@ -423,7 +433,8 @@ static void restore_regs(int fd,
 			 uint32_t ctx,
 			 const struct intel_execution_engine2 *e,
 			 unsigned int flags,
-			 uint32_t regs)
+			 uint32_t regs,
+			 uint64_t ahnd)
 {
 	const unsigned int gen = intel_gen(intel_get_drm_devid(fd));
 	const unsigned int gen_bit = 1 << gen;
@@ -435,6 +446,7 @@ static void restore_regs(int fd,
 	struct drm_i915_gem_relocation_entry *reloc;
 	unsigned int batch_size, n;
 	uint32_t *batch, *b;
+	uint32_t regs_size = NUM_REGS * sizeof(uint32_t);
 
 	if (gen < 7) /* no LRM */
 		return;
@@ -448,6 +460,12 @@ static void restore_regs(int fd,
 	memset(obj, 0, sizeof(obj));
 	obj[0].handle = regs;
 	obj[1].handle = gem_create(fd, batch_size);
+	if (ahnd) {
+		obj[0].offset = get_offset(ahnd, obj[0].handle, regs_size, 0);
+		obj[0].flags |= EXEC_OBJECT_PINNED | EXEC_OBJECT_WRITE;
+		obj[1].offset = get_offset(ahnd, obj[1].handle, batch_size, 0);
+		obj[1].flags |= EXEC_OBJECT_PINNED;
+	}
 	obj[1].relocs_ptr = to_user_pointer(reloc);
 
 	b = batch = gem_mmap__cpu(fd, obj[1].handle, 0, batch_size, PROT_WRITE);
@@ -478,13 +496,13 @@ static void restore_regs(int fd,
 			reloc[n].delta = offset;
 			reloc[n].read_domains = I915_GEM_DOMAIN_RENDER;
 			reloc[n].write_domain = 0;
-			*b++ = offset;
+			*b++ = obj[0].offset + offset;
 			if (r64b)
-				*b++ = 0;
+				*b++ = obj[0].offset >> 32;
 			n++;
 		}
 	}
-	obj[1].relocation_count = n;
+	obj[1].relocation_count = !ahnd ? n : 0;
 	*b++ = MI_BATCH_BUFFER_END;
 	munmap(batch, batch_size);
 
@@ -495,6 +513,7 @@ static void restore_regs(int fd,
 	execbuf.rsvd1 = ctx;
 	gem_execbuf(fd, &execbuf);
 	gem_close(fd, obj[1].handle);
+	put_offset(ahnd, obj[1].offset);
 }
 
 __attribute__((unused))
@@ -622,15 +641,18 @@ static void nonpriv(int fd,
 	for (int v = 0; v < num_values; v++) {
 		igt_spin_t *spin = NULL;
 		uint32_t ctx, regs[2], tmpl;
+		uint64_t ahnd;
 
 		ctx = gem_context_clone_with_engines(fd, 0);
+		ahnd = get_reloc_ahnd(ahnd, ctx);
 
-		tmpl = read_regs(fd, ctx, e, flags);
-		regs[0] = read_regs(fd, ctx, e, flags);
+		tmpl = read_regs(fd, ctx, e, flags, ahnd);
+		regs[0] = read_regs(fd, ctx, e, flags, ahnd);
 
 		tmpl_regs(fd, ctx, e, tmpl, values[v]);
 
-		spin = igt_spin_new(fd, .ctx_id = ctx, .engine = e->flags);
+		spin = igt_spin_new(fd, .ahnd = ahnd,
+				    .ctx_id = ctx, .engine = e->flags);
 
 		igt_debug("%s[%d]: Setting all registers to 0x%08x\n",
 			  __func__, v, values[v]);
@@ -638,15 +660,18 @@ static void nonpriv(int fd,
 
 		if (flags & DIRTY2) {
 			uint32_t sw = gem_context_clone_with_engines(fd, 0);
+			uint64_t ahnd_sw = get_reloc_ahnd(fd, sw);
 			igt_spin_t *syncpt, *dirt;
 
 			/* Explicit sync to keep the switch between write/read */
 			syncpt = igt_spin_new(fd,
+					      .ahnd = ahnd,
 					      .ctx_id = ctx,
 					      .engine = e->flags,
 					      .flags = IGT_SPIN_FENCE_OUT);
 
 			dirt = igt_spin_new(fd,
+					    .ahnd = ahnd_sw,
 					    .ctx_id = sw,
 					    .engine = e->flags,
 					    .fence = syncpt->out_fence,
@@ -655,6 +680,7 @@ static void nonpriv(int fd,
 			igt_spin_free(fd, syncpt);
 
 			syncpt = igt_spin_new(fd,
+					      .ahnd = ahnd,
 					      .ctx_id = ctx,
 					      .engine = e->flags,
 					      .fence = dirt->out_fence,
@@ -663,15 +689,16 @@ static void nonpriv(int fd,
 
 			igt_spin_free(fd, syncpt);
 			gem_context_destroy(fd, sw);
+			put_ahnd(ahnd_sw);
 		}
 
-		regs[1] = read_regs(fd, ctx, e, flags);
+		regs[1] = read_regs(fd, ctx, e, flags, ahnd);
 
 		/*
 		 * Restore the original register values before the HW idles.
 		 * Or else it may never restart!
 		 */
-		restore_regs(fd, ctx, e, flags, regs[0]);
+		restore_regs(fd, ctx, e, flags, regs[0], ahnd);
 
 		igt_spin_free(fd, spin);
 
@@ -681,6 +708,7 @@ static void nonpriv(int fd,
 			gem_close(fd, regs[n]);
 		gem_context_destroy(fd, ctx);
 		gem_close(fd, tmpl);
+		put_ahnd(ahnd);
 	}
 }
 
@@ -705,11 +733,14 @@ static void isolation(int fd,
 	for (int v = 0; v < num_values; v++) {
 		igt_spin_t *spin = NULL;
 		uint32_t ctx[2], regs[2], tmp;
+		uint64_t ahnd[2];
 
 		ctx[0] = gem_context_clone_with_engines(fd, 0);
-		regs[0] = read_regs(fd, ctx[0], e, flags);
+		ahnd[0] = get_reloc_ahnd(fd, ctx[0]);
+		regs[0] = read_regs(fd, ctx[0], e, flags, ahnd[0]);
 
-		spin = igt_spin_new(fd, .ctx_id = ctx[0], .engine = e->flags);
+		spin = igt_spin_new(fd, .ahnd = ahnd[0],
+				    .ctx_id = ctx[0], .engine = e->flags);
 
 		if (flags & DIRTY1) {
 			igt_debug("%s[%d]: Setting all registers of ctx 0 to 0x%08x\n",
@@ -726,7 +757,8 @@ static void isolation(int fd,
 		 * see the corruption from the previous context instead!
 		 */
 		ctx[1] = gem_context_clone_with_engines(fd, 0);
-		regs[1] = read_regs(fd, ctx[1], e, flags);
+		ahnd[1] = get_reloc_ahnd(fd, ctx[1]);
+		regs[1] = read_regs(fd, ctx[1], e, flags, ahnd[1]);
 
 		if (flags & DIRTY2) {
 			igt_debug("%s[%d]: Setting all registers of ctx 1 to 0x%08x\n",
@@ -738,8 +770,8 @@ static void isolation(int fd,
 		 * Restore the original register values before the HW idles.
 		 * Or else it may never restart!
 		 */
-		tmp = read_regs(fd, ctx[0], e, flags);
-		restore_regs(fd, ctx[0], e, flags, regs[0]);
+		tmp = read_regs(fd, ctx[0], e, flags, ahnd[0]);
+		restore_regs(fd, ctx[0], e, flags, regs[0], ahnd[0]);
 
 		igt_spin_free(fd, spin);
 
@@ -751,6 +783,7 @@ static void isolation(int fd,
 		for (int n = 0; n < ARRAY_SIZE(ctx); n++) {
 			gem_close(fd, regs[n]);
 			gem_context_destroy(fd, ctx[n]);
+			put_ahnd(ahnd[n]);
 		}
 		gem_close(fd, tmp);
 	}
@@ -821,21 +854,26 @@ static void preservation(int fd,
 	const unsigned int num_values = ARRAY_SIZE(values);
 	uint32_t ctx[num_values +1 ];
 	uint32_t regs[num_values + 1][2];
+	uint64_t ahnd[num_values + 1];
 	igt_spin_t *spin;
 
 	gem_quiescent_gpu(fd);
 
 	ctx[num_values] = gem_context_clone_with_engines(fd, 0);
-	spin = igt_spin_new(fd, .ctx_id = ctx[num_values], .engine = e->flags);
-	regs[num_values][0] = read_regs(fd, ctx[num_values], e, flags);
+	ahnd[num_values] = get_reloc_ahnd(fd, ctx[num_values]);
+	spin = igt_spin_new(fd, .ahnd = ahnd[num_values],
+			    .ctx_id = ctx[num_values], .engine = e->flags);
+	regs[num_values][0] = read_regs(fd, ctx[num_values], e, flags,
+					ahnd[num_values]);
+
 	for (int v = 0; v < num_values; v++) {
 		ctx[v] = gem_context_clone_with_engines(fd, 0);
+		ahnd[v] = get_reloc_ahnd(fd, ctx[v]);
 		write_regs(fd, ctx[v], e, flags, values[v]);
 
-		regs[v][0] = read_regs(fd, ctx[v], e, flags);
-
+		regs[v][0] = read_regs(fd, ctx[v], e, flags, ahnd[v]);
 	}
-	gem_close(fd, read_regs(fd, ctx[num_values], e, flags));
+	gem_close(fd, read_regs(fd, ctx[num_values], e, flags, ahnd[num_values]));
 	igt_spin_free(fd, spin);
 
 	if (flags & RESET)
@@ -868,8 +906,9 @@ static void preservation(int fd,
 
 	spin = igt_spin_new(fd, .ctx_id = ctx[num_values], .engine = e->flags);
 	for (int v = 0; v < num_values; v++)
-		regs[v][1] = read_regs(fd, ctx[v], e, flags);
-	regs[num_values][1] = read_regs(fd, ctx[num_values], e, flags);
+		regs[v][1] = read_regs(fd, ctx[v], e, flags, ahnd[v]);
+	regs[num_values][1] = read_regs(fd, ctx[num_values], e, flags,
+					ahnd[num_values]);
 	igt_spin_free(fd, spin);
 
 	for (int v = 0; v < num_values; v++) {
@@ -881,9 +920,11 @@ static void preservation(int fd,
 		gem_close(fd, regs[v][0]);
 		gem_close(fd, regs[v][1]);
 		gem_context_destroy(fd, ctx[v]);
+		put_ahnd(ahnd[v]);
 	}
 	compare_regs(fd, e, regs[num_values][0], regs[num_values][1], "clean");
 	gem_context_destroy(fd, ctx[num_values]);
+	put_ahnd(ahnd[num_values]);
 }
 
 static unsigned int __has_context_isolation(int fd)
-- 
2.26.0



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