[PATCH 1/2] drm/i915/xelpd: Enable dithering after the pipe CC1

Bhanuprakash Modem bhanuprakash.modem at intel.com
Thu Jun 17 16:00:47 UTC 2021


From: Nischal Varide <nischal.varide at intel.com>

For 12-bpc panels, Dithering should be enabled after the Color
Conversion (CC1) block. And to avoid the double dithering, we
must disable the Legacy (Dither at end of the pipe).

v2:
* Addressed review comments from Jani Nikula
V3:
* Cleanup

Cc: Uma Shankar <uma.shankar at intel.com>
Signed-off-by: Nischal Varide <nischal.varide at intel.com>
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem at intel.com>
---
 drivers/gpu/drm/i915/display/intel_color.c | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h            | 1 +
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index dab892d2251b..5eaceac9c66f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1573,6 +1573,7 @@ static int glk_color_check(struct intel_crtc_state *crtc_state)
 
 static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
 {
+	struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
 	u32 gamma_mode = 0;
 
 	if (crtc_state->hw.degamma_lut)
@@ -1588,6 +1589,10 @@ static u32 icl_gamma_mode(const struct intel_crtc_state *crtc_state)
 	else
 		gamma_mode |= GAMMA_MODE_MODE_12BIT_MULTI_SEGMENTED;
 
+	if (DISPLAY_VER(i915) >= 13 && !crtc_state->dither_force_disable &&
+	    crtc_state->pipe_bpp == 36)
+		gamma_mode |= POST_CC1_DITHER_ENABLE;
+
 	return gamma_mode;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 955027799d1d..15f4563de4d6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7743,6 +7743,7 @@ enum {
 #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
 #define  PRE_CSC_GAMMA_ENABLE	(1 << 31)
 #define  POST_CSC_GAMMA_ENABLE	(1 << 30)
+#define  POST_CC1_DITHER_ENABLE (1 << 26)
 #define  GAMMA_MODE_MODE_MASK	(3 << 0)
 #define  GAMMA_MODE_MODE_8BIT	(0 << 0)
 #define  GAMMA_MODE_MODE_10BIT	(1 << 0)
-- 
2.20.1



More information about the Intel-gfx-trybot mailing list