[CI 0/5] Pipe DMC with "Limit disabling PSR around cdclk changes to ADL-P"
Gwan-gyeong Mun
gwan-gyeong.mun at intel.com
Thu Jun 17 16:10:21 UTC 2021
The Pipe DMC series https://patchwork.freedesktop.org/series/90445/
encountered regressions with PSR error signatures.
This patch series includes "Limit disabling PSR around cdclk changes to ADL-P"
This is to test if the limiting makes CI happy or not.
Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
Anusha Srivatsa (4):
drm/i915/dmc: Introduce DMC_FW_MAIN
drm/i915/xelpd: Pipe A DMC plugging
drm/i915/adl_p: Pipe B DMC Support
drm/i915/adl_p: Load DMC
Gwan-gyeong Mun (1):
drm/i915/display: Limit disabling PSR around cdclk changes to ADL-P
drivers/gpu/drm/i915/display/intel_cdclk.c | 22 ++-
.../drm/i915/display/intel_display_debugfs.c | 6 +-
.../drm/i915/display/intel_display_power.c | 5 +-
drivers/gpu/drm/i915/display/intel_dmc.c | 165 ++++++++++--------
drivers/gpu/drm/i915/display/intel_dmc.h | 23 ++-
drivers/gpu/drm/i915/i915_reg.h | 2 +-
6 files changed, 139 insertions(+), 84 deletions(-)
--
2.31.1
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