[PATCH i-g-t 41/47] WIP: gem_exec_schedule
Zbigniew Kempczyński
zbigniew.kempczynski at intel.com
Wed Jun 30 08:39:57 UTC 2021
---
tests/i915/gem_exec_schedule.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index c3fa2a773..624e742be 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1309,6 +1309,7 @@ noreorder(int i915, unsigned int engine, int prio, unsigned int flags)
int fence = -1;
uint64_t addr;
uint32_t ctx;
+ uint64_t ahnd0 = get_reloc_ahnd(i915, 0), ahndX;
if (flags & CORKED)
fence = igt_cork_plug(&cork, i915);
@@ -1317,7 +1318,9 @@ noreorder(int i915, unsigned int engine, int prio, unsigned int flags)
I915_CONTEXT_CLONE_ENGINES |
I915_CONTEXT_CLONE_VM,
0);
+ ahndX = get_reloc_ahnd(i915, ctx);
spin = igt_spin_new(i915, ctx,
+ .ahnd = ahndX,
.engine = engine,
.fence = fence,
.flags = IGT_SPIN_FENCE_OUT | IGT_SPIN_FENCE_IN);
@@ -1390,6 +1393,7 @@ noreorder(int i915, unsigned int engine, int prio, unsigned int flags)
* Without timeslices, fallback to waiting a second.
*/
slice = igt_spin_new(i915,
+ .ahnd = ahnd0,
.engine = engine,
.flags = IGT_SPIN_POLL_RUN);
igt_until_timeout(1) {
@@ -1402,6 +1406,8 @@ noreorder(int i915, unsigned int engine, int prio, unsigned int flags)
igt_assert_eq(sync_fence_status(spin->out_fence), 0);
igt_spin_free(i915, spin);
gem_quiescent_gpu(i915);
+ put_ahnd(ahnd0);
+ put_ahnd(ahndX);
}
static void reorder(int fd, unsigned ring, unsigned flags)
--
2.26.0
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