[PATCH 2/7] move locking

[Matthew Auld]

---
 drivers/gpu/drm/i915/gt/gen6_ppgtt.c    |  5 -----
 drivers/gpu/drm/i915/gt/intel_context.c | 11 +++++++++++
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
index 4a166d25fe60..6dc56e31cdca 100644
--- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
@@ -343,11 +343,6 @@ int gen6_ppgtt_pin(struct i915_ppgtt *base, struct i915_gem_ww_ctx *ww)
 	if (atomic_add_unless(&ppgtt->pin_count, 1, 0))
 		return 0;
 
-	/* grab the ppgtt resv to pin the object */
-	err = i915_vm_lock_objects(&ppgtt->base.vm, ww);
-	if (err)
-		return err;
-
 	/*
 	 * PPGTT PDEs reside in the GGTT and consists of 512 entries. The
 	 * allocator works in address space sizes, so it's multiplied by page
diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c
index 5634d14052bc..ef94f0332f19 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -199,6 +199,14 @@ static void intel_context_post_unpin(struct intel_context *ce)
 	__ring_retire(ce->ring);
 }
 
+static struct i915_address_space *vm_alias(struct i915_address_space *vm)
+{
+	if (i915_is_ggtt(vm))
+		vm = &i915_vm_to_ggtt(vm)->alias->vm;
+
+	return vm;
+}
+
 int __intel_context_do_pin_ww(struct intel_context *ce,
 			      struct i915_gem_ww_ctx *ww)
 {
@@ -223,6 +231,9 @@ int __intel_context_do_pin_ww(struct intel_context *ce,
 		err = i915_gem_object_lock(ce->ring->vma->obj, ww);
 	if (!err && ce->state)
 		err = i915_gem_object_lock(ce->state->obj, ww);
+	if (!err && ce->vm->gt->submission_method == INTEL_SUBMISSION_RING &&
+	    vm_alias(ce->vm))
+		err = i915_vm_lock_objects(vm_alias(ce->vm), ww);
 	if (!err)
 		err = intel_context_pre_pin(ce, ww);
 	if (err)
-- 
2.31.1