[PATCH i-g-t 1/3] Add test gem_exec_kamil
Kamil Konieczny
kamil.konieczny at linux.intel.com
Fri Oct 22 14:35:57 UTC 2021
Add gem_exec_kamil with two basic tests.
Signed-off-by: Kamil Konieczny <kamil.konieczny at linux.intel.com>
---
tests/i915/gem_exec_kamil.c | 286 ++++++++++++++++++++++++++++++++++++
tests/meson.build | 1 +
2 files changed, 287 insertions(+)
create mode 100644 tests/i915/gem_exec_kamil.c
diff --git a/tests/i915/gem_exec_kamil.c b/tests/i915/gem_exec_kamil.c
new file mode 100644
index 00000000..94366b30
--- /dev/null
+++ b/tests/i915/gem_exec_kamil.c
@@ -0,0 +1,286 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_collection.h"
+
+#include "i915/gem_create.h"
+
+IGT_TEST_DESCRIPTION("Basic sanity check of execbuf-ioctl rings.");
+
+static void gem(int fd)
+{
+ uint32_t bb = gem_create(fd, 4096); // todo: why fd+1 works ???
+
+ igt_info("bb handle: %x\n", bb);
+ gem_close(fd, bb);
+ igt_info("bb closed: %x\n", bb);
+}
+
+static void offsety(int i915)
+{
+ uint32_t obiekt = gem_create(i915, 8192);
+ uint32_t bb = gem_create(i915, 4096);
+ uint32_t fake = gem_create(i915, 0x5000);
+ const uint32_t bbe = MI_BATCH_BUFFER_END;
+ int i;
+ uint32_t *ptr;
+
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj[3];
+ struct drm_i915_gem_relocation_entry reloc = {};
+
+ gem_write(i915, bb, 0, &bbe, sizeof(bbe));
+
+ ptr = gem_mmap__cpu_coherent(i915, bb, 0, 4096, PROT_READ);
+ for (i = 0; i < 8; i++)
+ igt_info("[%04x]: %08x\n", i, ptr[i]);
+ gem_munmap(ptr, 4096);
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.buffer_count = 3;
+
+ memset(obj, 0, sizeof(obj));
+ obj[0].handle = fake;
+ obj[0].offset = 0;
+ obj[0].flags = EXEC_OBJECT_PINNED;
+ obj[1].handle = obiekt;
+ obj[1].alignment = 0x2000;
+ obj[2].handle = bb;
+ obj[2].relocation_count = 1;
+ obj[2].relocs_ptr = to_user_pointer(&reloc);
+ obj[2].offset = 0;
+ // offset = 0 with PINNED page will cause test fail, conflict with offset for fake
+ // obj[2].flags = EXEC_OBJECT_PINNED;
+
+ reloc.presumed_offset = -1;
+ reloc.offset = 16;
+ reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
+ reloc.target_handle = obj[1].handle;
+
+ igt_info("A obj[0].offset: %llx, handle: %u\n", obj[0].offset, obj[0].handle);
+ igt_info("A obj[1].offset: %llx, handle: %u\n", obj[1].offset, obj[1].handle);
+ igt_info("A obj[2].offset: %llx, handle: %u\n", obj[2].offset, obj[2].handle);
+ gem_execbuf(i915, &execbuf);
+
+ igt_info("B obj[0].offset: %llx, handle: %u\n", obj[0].offset, obj[0].handle);
+ igt_info("B obj[1].offset: %llx, handle: %u\n", obj[1].offset, obj[1].handle);
+ igt_info("B obj[2].offset: %llx, handle: %u\n", obj[2].offset, obj[2].handle);
+
+ ptr = gem_mmap__cpu_coherent(i915, bb, 0, 4096, PROT_READ);
+ for (i = 0; i < 8; i++)
+ igt_info("[%04x]: %08x\n", i, ptr[i]);
+ gem_munmap(ptr, 4096);
+}
+
+#define MI_COPY ((2 << 29) | (0x53 << 22) | (3 << 20) | 8)
+
+static void copyrnd(int i915, bool use_reloc)
+{
+ uint32_t src = gem_create(i915, 4096);
+ uint32_t dst = gem_create(i915, 4096);
+ uint32_t bb = gem_create(i915, 4096);
+ uint32_t batch[16] = {}; //MI_BATCH_BUFFER_END;
+ int i;
+ uint32_t *ptr;
+ char myaddr[128], mybuff[1024], mybatch[1024];
+
+ struct drm_i915_gem_execbuffer2 execbuf;
+ struct drm_i915_gem_exec_object2 obj[3];
+ struct drm_i915_gem_relocation_entry reloc[2];
+
+ ptr = gem_mmap__cpu_coherent(i915, src, 0, 4096, PROT_READ|PROT_WRITE);
+ for (i = 0; i < 4096/4; i++)
+ ptr[i] = i; //rnd();
+
+ gem_munmap(ptr, 4096);
+ i = 0;
+ batch[i++] = MI_COPY;
+ // 0xcc - COPY ROP (ROP = Raster OP) - Blitter
+ batch[i++] = (3 << 24) | (0xcc << 16) | (1024); // 1024 = dst pitch
+ // dst
+ batch[i++] = 0; // Y1, X1 top, left
+ batch[i++] = (1 << 16) | 0x400; // Y2, X2 bottom, right 0,1024 ??? 1 or 0 ???
+ batch[i++] = 0x1000; // dst addr low-endian
+ batch[i++] = 0; // dst addr high bits
+ // src
+ batch[i++] = 0; // Y1, X1 top, left
+ batch[i++] = 1024; // src pitch
+ //
+ batch[i++] = 0x2000; // src addr low-endian
+ batch[i++] = 0; // src addr
+ igt_assert((i % 2) == 0);
+ batch[i++] = MI_BATCH_BUFFER_END;
+ batch[i++] = 0; // MI_NOP
+ // redundant = from array init {}
+
+ gem_write(i915, bb, 0, batch, sizeof(batch));
+
+ memset(&execbuf, 0, sizeof(execbuf));
+ execbuf.buffers_ptr = to_user_pointer(obj);
+ execbuf.buffer_count = 3;
+ execbuf.flags = I915_EXEC_BLT; // blitter
+
+ memset(obj, 0, sizeof(obj));
+ obj[0].handle = src;
+ obj[1].flags = EXEC_OBJECT_WRITE;
+ obj[1].handle = dst;
+ obj[2].handle = bb;
+ obj[2].offset = 0;
+ if (use_reloc) {
+ memset(reloc, 0, sizeof(reloc));
+ reloc[0].offset = 4*sizeof(uint32_t);
+ reloc[0].presumed_offset = -1;
+ reloc[0].target_handle = dst;
+ reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
+ reloc[1].offset = 8*sizeof(uint32_t);
+ reloc[1].presumed_offset = -1;
+ reloc[1].target_handle = src;
+ reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[1].write_domain = 0;
+ obj[2].relocation_count = 2;
+ obj[2].relocs_ptr = to_user_pointer(reloc);
+ } else {
+ obj[0].offset = 0x2000;
+ obj[0].flags = EXEC_OBJECT_PINNED;
+ obj[1].offset = 0x1000;
+ obj[1].flags |= EXEC_OBJECT_PINNED;
+ }
+
+ gem_execbuf(i915, &execbuf);
+ i = getpid();
+ sprintf(myaddr, "%04x s/d %06" PRIx64 "/%06" PRIx64, i,
+ (uint64_t)obj[0].offset, (uint64_t)obj[1].offset);
+ //igt_info("%s\n", myaddr);
+ //
+ //gem_sync(i915, dst); // if no WRTIE flag
+ //
+ gem_set_domain(i915, dst, I915_GEM_DOMAIN_CPU, 0); // this or above, experiment without it
+ //
+ gem_sync(i915, bb);
+
+ ptr = gem_mmap__cpu_coherent(i915, dst, 0, 4096, PROT_READ); // device|cpu
+ //for (i = 0; i < 8; i++)
+ // igt_info("[%04x]: %08x\n", i, ptr[i]);
+ sprintf(mybuff, "%x %x %x %x", ptr[0], ptr[1], ptr[2], ptr[3]);
+ gem_munmap(ptr, 4096);
+
+ //igt_info("batchbuffer:\n");
+ ptr = gem_mmap__cpu_coherent(i915, bb, 0, 4096, PROT_READ); // device|cpu
+ //for (i = 0; i < 16; i++)
+ // igt_info("[%04x]: %08x\n", i, ptr[i]);
+ sprintf(mybatch, "%x %x %x %x %06x %x %x %x %x", ptr[0], ptr[1], ptr[2], ptr[3],
+ ptr[4], ptr[5], ptr[6], ptr[7], ptr[8]);
+ gem_munmap(ptr, 4096);
+ igt_info("%s %s %s\n", myaddr, mybuff, mybatch);
+}
+
+static void fork_ten(int i915)
+{
+ int child;
+ time_t t;
+ const int n = 10;
+
+ /* Intializes random number generator */
+ //srand((unsigned) time(&t));
+ srand(42); //3137417);
+
+ // igt_fork() - re-worked macro
+ for (child = 0; child < n; ++child) {
+ if(__igt_fork())
+ break;
+ }
+
+ if (child == n) { // parent
+ igt_waitchildren_timeout(3, "fork_ten wait timeout"); //int seconds, const char *reason
+ } else { // children
+ //srand((unsigned) time(&t));
+ for (int i=0; i < 2*child; ++i) rand();
+
+ usleep(1000 + (rand() % 8000));
+ copyrnd(i915, true);
+ exit(0);
+ }
+}
+
+igt_main
+{
+ int fd = -1;
+
+ igt_fixture {
+ fd = drm_open_driver(DRIVER_INTEL);
+ }
+
+ igt_subtest("gem") {
+ gem(fd);
+ }
+ igt_subtest("offsety") {
+ offsety(fd);
+ }
+ igt_subtest("copyrnd-noreloc") {
+ copyrnd(fd, false);
+ }
+ igt_subtest("copyrnd-reloc") {
+ copyrnd(fd, true);
+ }
+ igt_subtest("fork-ten") {
+ fork_ten(fd);
+ }
+ igt_subtest("exec") {
+
+ }
+/* igt_subtest_with_dynamic("basic") {
+ for_each_combination(regions, 1, set) {
+ char *sub_name = memregion_dynamic_subtest_name(regions);
+ struct drm_i915_gem_exec_object2 exec;
+ uint32_t region = igt_collection_get_value(regions, 0);
+
+ batch_size = gem_get_batch_size(fd, MEMORY_TYPE_FROM_REGION(region));
+ memset(&exec, 0, sizeof(exec));
+ exec.handle = batch_create(fd, batch_size, region);
+
+ for_each_ctx_engine(fd, ctx, e) {
+ igt_dynamic_f("%s-%s", e->name, sub_name) {
+ struct drm_i915_gem_execbuffer2 execbuf = {
+ .buffers_ptr = to_user_pointer(&exec),
+ .buffer_count = 1,
+ .flags = e->flags,
+ .rsvd1 = ctx->id,
+ };
+
+ gem_execbuf(fd, &execbuf);
+ }
+ }
+ gem_sync(fd, exec.handle);
+ gem_close(fd, exec.handle);
+ free(sub_name);
+ }
+ }
+*/
+ igt_fixture {
+ close(fd);
+ }
+}
diff --git a/tests/meson.build b/tests/meson.build
index 0af3e03a..29cdbd30 100644
--- a/tests/meson.build
+++ b/tests/meson.build
@@ -132,6 +132,7 @@ i915_progs = [
'gem_exec_fence',
'gem_exec_flush',
'gem_exec_gttfill',
+ 'gem_exec_kamil',
'gem_exec_latency',
'gem_exec_lut_handle',
'gem_exec_nop',
--
2.30.2
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