✓ Fi.CI.BAT: success for series starting with [1/7] drm/i915/display/drrs: Split the DRRS status per connector
Patchwork
patchwork at emeril.freedesktop.org
Fri Apr 22 03:03:57 UTC 2022
== Series Details ==
Series: series starting with [1/7] drm/i915/display/drrs: Split the DRRS status per connector
URL : https://patchwork.freedesktop.org/series/102960/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11538 -> Trybot_102960v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/index.html
Participating hosts (45 -> 34)
------------------------------
Missing (11): bat-dg1-6 bat-dg2-8 bat-adlm-1 bat-dg2-9 fi-apl-guc bat-adlp-6 bat-adlp-4 fi-hsw-4770 bat-rpls-1 bat-rpls-2 bat-jsl-1
Known issues
------------
Here are the changes found in Trybot_102960v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt at gem_exec_suspend@basic-s3 at smem:
- fi-bdw-5557u: [PASS][1] -> [INCOMPLETE][2] ([i915#146])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11538/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
#### Possible fixes ####
* igt at i915_selftest@live at hangcheck:
- fi-hsw-g3258: [INCOMPLETE][3] ([i915#3303] / [i915#4785]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11538/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
* igt at i915_suspend@system-suspend-without-i915:
- fi-skl-6700k2: [INCOMPLETE][5] ([i915#4939]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11538/fi-skl-6700k2/igt@i915_suspend@system-suspend-without-i915.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/fi-skl-6700k2/igt@i915_suspend@system-suspend-without-i915.html
* igt at kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][7] ([i915#4269]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11538/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939
Build changes
-------------
* Linux: CI_DRM_11538 -> Trybot_102960v1
CI-20190529: 20190529
CI_DRM_11538: bb5c1e0f726f731591f79f96e19a0defc248eabd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6444: df584c804e3a44431b0e5ae21c190b6e9acb35ab @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Trybot_102960v1: bb5c1e0f726f731591f79f96e19a0defc248eabd @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
ac8c67debc49 enable up to PSR1 to allow PSR1 + DRRS
16ab0fcd4e5a drm/i915/display: Allow PSR1 and seamless DRRS together
300e313d4900 drm/i915/display: Implement seamless mode switch
598a5246db13 drm/i915/display: Replace crtc_state's has_drrs by drrs_downclock_mode
dd985efbf269 drm: Add infrastructure to allow seamless mode switches
63fb34b4cd1f drm/i915/display/drrs: Remove repeated DRRS in i915_drrs_status
6114f37e4f6e drm/i915/display/drrs: Split the DRRS status per connector
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_102960v1/index.html
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