[PATCH 6/6] drm/i915/disaply: Plug new struct in intel_cdclk_can_squash()

[Anusha Srivatsa]

Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 406b5612dd66..7168fae35bd3 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1709,6 +1709,10 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 			  const struct intel_cdclk_config *cdclk_config,
 			  enum pipe pipe)
 {
+	struct intel_atomic_state *state;
+	struct intel_cdclk_state *new_cdclk_state;
+	struct cdclk_step *cdclk_steps;
+	struct intel_cdclk_state *cdclk_state;
 	int cdclk = cdclk_config->cdclk;
 	int vco = cdclk_config->vco;
 	u32 val;
@@ -1716,6 +1720,11 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 	int clock;
 	int ret;
 
+	cdclk_state =  to_intel_cdclk_state(i915->cdclk.obj.state);
+	state = cdclk_state->base.state;
+	new_cdclk_state = intel_atomic_get_new_cdclk_state(state);
+	cdclk_steps = new_cdclk_state->steps;
+
 	/* Inform power controller of upcoming frequency change. */
 	if (DISPLAY_VER(i915) >= 11)
 		ret = skl_pcode_request(&i915->uncore, SKL_PCODE_CDCLK_CONTROL,
-- 
2.25.1