[PATCH 5/7] Experimenting with drm_atomic_state and intel_atomic_state

[Anusha Srivatsa]

Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 111d1014eb26..522203c01a21 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1709,6 +1709,8 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 			  const struct intel_cdclk_config *cdclk_config,
 			  enum pipe pipe)
 {
+	struct drm_atomic_state *drm_state = i915->modeset_restore_state;
+	struct intel_atomic_state *state;
 	int cdclk = cdclk_config->cdclk;
 	int vco = cdclk_config->vco;
 	u32 val;
@@ -1716,6 +1718,7 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 	int clock;
 	int ret;
 
+	state = to_intel_atomic_state(drm_state);
 	/* Inform power controller of upcoming frequency change. */
 	if (DISPLAY_VER(i915) >= 11)
 		ret = skl_pcode_request(&i915->uncore, SKL_PCODE_CDCLK_CONTROL,
-- 
2.25.1