[PATCH 6/7] drm/i915/display: Plug squash to cdclk atomic changes

[Anusha Srivatsa]

Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 21 ++++++++++++++++-----
 1 file changed, 16 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 522203c01a21..d109d0ee224a 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1710,7 +1710,10 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 			  enum pipe pipe)
 {
 	struct drm_atomic_state *drm_state = i915->modeset_restore_state;
-	struct intel_atomic_state *state;
+	struct intel_atomic_state *state = to_intel_atomic_state(drm_state);
+	const struct intel_cdclk_state *new_cdclk_state =
+                intel_atomic_get_new_cdclk_state(state);
+	enum cdclk_sequence cdclk_transition = new_cdclk_state->steps->action;
 	int cdclk = cdclk_config->cdclk;
 	int vco = cdclk_config->vco;
 	u32 val;
@@ -1718,7 +1721,6 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 	int clock;
 	int ret;
 
-	state = to_intel_atomic_state(drm_state);
 	/* Inform power controller of upcoming frequency change. */
 	if (DISPLAY_VER(i915) >= 11)
 		ret = skl_pcode_request(&i915->uncore, SKL_PCODE_CDCLK_CONTROL,
@@ -1766,7 +1768,7 @@ static void bxt_set_cdclk(struct drm_i915_private *i915,
 	else
 		clock = cdclk;
 
-	if (has_cdclk_squasher(i915))
+	if (cdclk_transition == CDCLK_SQUASH_ONLY)
 		dg2_prog_squash_ctl(i915, waveform);
 
 	val = bxt_cdclk_cd2x_div_sel(i915, clock, vco) |
@@ -1980,8 +1982,10 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
 
 static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
 				   const struct intel_cdclk_config *a,
-				   const struct intel_cdclk_config *b)
+				   const struct intel_cdclk_config *b,
+				   struct intel_cdclk_state *new_cdclk)
 {
+	struct cdclk_step *cdclk_transition = new_cdclk->steps;
 	/*
 	 * FIXME should store a bit more state in intel_cdclk_config
 	 * to differentiate squasher vs. cd2x divider properly. For
@@ -1991,6 +1995,12 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
 	if (!has_cdclk_squasher(dev_priv))
 		return false;
 
+	if (a->cdclk != b->cdclk && a->vco != 0 &&
+	    a->vco == b->vco &&	a->ref == b->ref) {
+		cdclk_transition->action = CDCLK_SQUASH_ONLY;
+		cdclk_transition->cdclk = b->cdclk;
+	}
+
 	return a->cdclk != b->cdclk &&
 		a->vco != 0 &&
 		a->vco == b->vco &&
@@ -2772,7 +2782,8 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state)
 
 	if (intel_cdclk_can_squash(dev_priv,
 				   &old_cdclk_state->actual,
-				   &new_cdclk_state->actual)) {
+				   &new_cdclk_state->actual,
+				   new_cdclk_state)) {
 		drm_dbg_kms(&dev_priv->drm,
 			    "Can change cdclk via squasher\n");
 	} else if (intel_cdclk_can_crawl(dev_priv,
-- 
2.25.1