[PATCH 27/27] HAX: DG1 small BAR

Matthew Auld matthew.auld at intel.com
Thu Feb 10 11:10:26 UTC 2022


Just for CI.

Signed-off-by: Matthew Auld <matthew.auld at intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_create.c  | 5 ++---
 drivers/gpu/drm/i915/gt/intel_region_lmem.c | 2 +-
 2 files changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index bc1235578e74..faccbc299848 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -437,9 +437,8 @@ i915_gem_create_ext_ioctl(struct drm_device *dev, void *data,
 		if (!(ext_data.placement_mask & BIT(INTEL_REGION_SMEM)))
 			return -EINVAL;
 	} else {
-		if (!IS_DG1(i915) && (ext_data.n_placements > 1 ||
-				      ext_data.placements[0]->type !=
-				      INTEL_MEMORY_SYSTEM))
+		if (ext_data.n_placements > 1 ||
+		    ext_data.placements[0]->type != INTEL_MEMORY_SYSTEM)
 			ext_data.flags |= I915_BO_ALLOC_GPU_ONLY;
 	}
 
diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index ad3cf348b4a8..44662e9c4c4d 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -212,7 +212,7 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
 	lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE);
 
 	io_start = pci_resource_start(pdev, 2);
-	io_size = min(pci_resource_len(pdev, 2), lmem_size);
+	io_size = SZ_256M;
 	if (!io_size)
 		return ERR_PTR(-ENODEV);
 
-- 
2.34.1



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