[PATCH 08/19] drm/i915: Sanitize the power well names
Imre Deak
imre.deak at intel.com
Thu Jan 27 22:20:55 UTC 2022
Use the shortest descriptive name for all power wells for simplicity and
to use the same name for the same type of power wells on multiple
platforms.
Signed-off-by: Imre Deak <imre.deak at intel.com>
---
.../i915/display/intel_display_power_map.c | 254 +++++++++---------
1 file changed, 127 insertions(+), 127 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
index d7bf9c9d0adf9..3364429ad8f7c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -495,7 +495,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -506,7 +506,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "MISC IO power well",
+ .name = "MISC_IO",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -516,12 +516,12 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_MISC_IO,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = SKL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -532,7 +532,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "DDI A/E IO power well",
+ .name = "DDI_IO_A_E",
.domains = SKL_DISPLAY_DDI_IO_A_E_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -540,7 +540,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_DDI_A_E,
},
}, {
- .name = "DDI B IO power well",
+ .name = "DDI_IO_B",
.domains = SKL_DISPLAY_DDI_IO_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -548,7 +548,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO power well",
+ .name = "DDI_IO_C",
.domains = SKL_DISPLAY_DDI_IO_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -556,7 +556,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_DDI_C,
},
}, {
- .name = "DDI D IO power well",
+ .name = "DDI_IO_D",
.domains = SKL_DISPLAY_DDI_IO_D_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -611,7 +611,7 @@ static const struct i915_power_well_desc bxt_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -622,12 +622,12 @@ static const struct i915_power_well_desc bxt_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = BXT_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -721,7 +721,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -732,12 +732,12 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = GLK_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = GLK_DISPLAY_POWERWELL_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -772,7 +772,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.bxt.phy = DPIO_PHY2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = GLK_DISPLAY_AUX_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -780,7 +780,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = GLK_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = GLK_DISPLAY_AUX_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -788,7 +788,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = GLK_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = GLK_DISPLAY_AUX_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -796,7 +796,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = GLK_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "DDI A IO power well",
+ .name = "DDI_IO_A",
.domains = GLK_DISPLAY_DDI_IO_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -804,7 +804,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = GLK_PW_CTL_IDX_DDI_A,
},
}, {
- .name = "DDI B IO power well",
+ .name = "DDI_IO_B",
.domains = GLK_DISPLAY_DDI_IO_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -812,7 +812,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
.hsw.idx = SKL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO power well",
+ .name = "DDI_IO_C",
.domains = GLK_DISPLAY_DDI_IO_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -916,7 +916,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -927,12 +927,12 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = ICL_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -941,7 +941,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = ICL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -952,7 +952,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -960,7 +960,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
},
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -968,7 +968,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
},
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -976,7 +976,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
},
}, {
- .name = "DDI D IO",
+ .name = "DDI_IO_D",
.domains = ICL_DDI_IO_D_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -984,7 +984,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_D,
},
}, {
- .name = "DDI E IO",
+ .name = "DDI_IO_E",
.domains = ICL_DDI_IO_E_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -992,7 +992,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_E,
},
}, {
- .name = "DDI F IO",
+ .name = "DDI_IO_F",
.domains = ICL_DDI_IO_F_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1000,7 +1000,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_F,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1008,7 +1008,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1016,7 +1016,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C TC1",
+ .name = "AUX_C",
.domains = ICL_AUX_C_TC1_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1025,7 +1025,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX D TC2",
+ .name = "AUX_D",
.domains = ICL_AUX_D_TC2_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1034,7 +1034,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_D,
},
}, {
- .name = "AUX E TC3",
+ .name = "AUX_E",
.domains = ICL_AUX_E_TC3_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1043,7 +1043,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_E,
},
}, {
- .name = "AUX F TC4",
+ .name = "AUX_F",
.domains = ICL_AUX_F_TC4_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1052,7 +1052,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_F,
},
}, {
- .name = "AUX C TBT1",
+ .name = "AUX_TBT1",
.domains = ICL_AUX_C_TBT1_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1061,7 +1061,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX D TBT2",
+ .name = "AUX_TBT2",
.domains = ICL_AUX_D_TBT2_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1070,7 +1070,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX E TBT3",
+ .name = "AUX_TBT3",
.domains = ICL_AUX_E_TBT3_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1079,7 +1079,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX F TBT4",
+ .name = "AUX_TBT4",
.domains = ICL_AUX_F_TBT4_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1088,7 +1088,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_TBT4,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = ICL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_C),
@@ -1204,7 +1204,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -1215,12 +1215,12 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = TGL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = TGL_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1229,7 +1229,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = TGL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -1240,7 +1240,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1248,7 +1248,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1256,7 +1256,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1264,7 +1264,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1272,7 +1272,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1280,7 +1280,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "DDI IO TC3",
+ .name = "DDI_IO_TC3",
.domains = TGL_DDI_IO_TC3_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1288,7 +1288,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC3,
},
}, {
- .name = "DDI IO TC4",
+ .name = "DDI_IO_TC4",
.domains = TGL_DDI_IO_TC4_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1296,7 +1296,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC4,
},
}, {
- .name = "DDI IO TC5",
+ .name = "DDI_IO_TC5",
.domains = TGL_DDI_IO_TC5_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1304,7 +1304,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC5,
},
}, {
- .name = "DDI IO TC6",
+ .name = "DDI_IO_TC6",
.domains = TGL_DDI_IO_TC6_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1312,12 +1312,12 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC6,
},
}, {
- .name = "TC cold off",
+ .name = "TC_cold_off",
.domains = TGL_TC_COLD_OFF_POWER_DOMAINS,
.ops = &tgl_tc_cold_off_ops,
.id = TGL_DISP_PW_TC_COLD_OFF,
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = TGL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1325,7 +1325,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = TGL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1333,7 +1333,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = TGL_AUX_C_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1341,7 +1341,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1350,7 +1350,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1359,7 +1359,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "AUX USBC3",
+ .name = "AUX_USBC3",
.domains = TGL_AUX_IO_USBC3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1368,7 +1368,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC3,
},
}, {
- .name = "AUX USBC4",
+ .name = "AUX_USBC4",
.domains = TGL_AUX_IO_USBC4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1377,7 +1377,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC4,
},
}, {
- .name = "AUX USBC5",
+ .name = "AUX_USBC5",
.domains = TGL_AUX_IO_USBC5_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1386,7 +1386,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC5,
},
}, {
- .name = "AUX USBC6",
+ .name = "AUX_USBC6",
.domains = TGL_AUX_IO_USBC6_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1395,7 +1395,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC6,
},
}, {
- .name = "AUX TBT1",
+ .name = "AUX_TBT1",
.domains = TGL_AUX_IO_TBT1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1404,7 +1404,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX TBT2",
+ .name = "AUX_TBT2",
.domains = TGL_AUX_IO_TBT2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1413,7 +1413,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX TBT3",
+ .name = "AUX_TBT3",
.domains = TGL_AUX_IO_TBT3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1422,7 +1422,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX TBT4",
+ .name = "AUX_TBT4",
.domains = TGL_AUX_IO_TBT4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1431,7 +1431,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT4,
},
}, {
- .name = "AUX TBT5",
+ .name = "AUX_TBT5",
.domains = TGL_AUX_IO_TBT5_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1440,7 +1440,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT5,
},
}, {
- .name = "AUX TBT6",
+ .name = "AUX_TBT6",
.domains = TGL_AUX_IO_TBT6_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -1449,7 +1449,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT6,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = TGL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1459,7 +1459,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "power well 5",
+ .name = "PW_5",
.domains = TGL_PW_5_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1527,7 +1527,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -1538,12 +1538,12 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = RKL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = RKL_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
@@ -1554,7 +1554,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = RKL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1564,7 +1564,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1572,7 +1572,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1580,7 +1580,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1588,7 +1588,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1596,7 +1596,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1604,7 +1604,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1612,7 +1612,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1620,7 +1620,7 @@ static const struct i915_power_well_desc rkl_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1667,7 +1667,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -1678,12 +1678,12 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = DG1_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = DG1_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1692,7 +1692,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well 3",
+ .name = "PW_3",
.domains = DG1_PW_3_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
@@ -1703,7 +1703,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_3,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1711,7 +1711,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1719,7 +1719,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = TGL_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1727,7 +1727,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
},
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = TGL_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1735,7 +1735,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
},
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = TGL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1743,7 +1743,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = TGL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1751,7 +1751,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = TGL_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1760,7 +1760,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = TGL_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = false,
@@ -1769,7 +1769,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "power well 4",
+ .name = "PW_4",
.domains = TGL_PW_4_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1779,7 +1779,7 @@ static const struct i915_power_well_desc dg1_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_4,
}
}, {
- .name = "power well 5",
+ .name = "PW_5",
.domains = TGL_PW_5_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_fuses = true,
@@ -1911,7 +1911,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.always_on = true,
.id = DISP_PW_ID_NONE,
}, {
- .name = "power well 1",
+ .name = "PW_1",
/* Handled by the DMC firmware */
.domains = 0,
.ops = &hsw_power_well_ops,
@@ -1922,12 +1922,12 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_1,
},
}, {
- .name = "DC off",
+ .name = "DC_off",
.domains = XELPD_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_DC_OFF,
}, {
- .name = "power well 2",
+ .name = "PW_2",
.domains = XELPD_PW_2_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.has_vga = true,
@@ -1937,7 +1937,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_PW_2,
},
}, {
- .name = "power well A",
+ .name = "PW_A",
.domains = XELPD_PW_A_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_A),
@@ -1947,7 +1947,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_PW_A,
},
}, {
- .name = "power well B",
+ .name = "PW_B",
.domains = XELPD_PW_B_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_B),
@@ -1957,7 +1957,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_PW_B,
},
}, {
- .name = "power well C",
+ .name = "PW_C",
.domains = XELPD_PW_C_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_C),
@@ -1967,7 +1967,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_PW_C,
},
}, {
- .name = "power well D",
+ .name = "PW_D",
.domains = XELPD_PW_D_POWER_DOMAINS,
.ops = &hsw_power_well_ops,
.irq_pipe_mask = BIT(PIPE_D),
@@ -1977,7 +1977,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_PW_D,
},
}, {
- .name = "DDI A IO",
+ .name = "DDI_IO_A",
.domains = ICL_DDI_IO_A_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1985,7 +1985,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_A,
}
}, {
- .name = "DDI B IO",
+ .name = "DDI_IO_B",
.domains = ICL_DDI_IO_B_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -1993,7 +1993,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_B,
}
}, {
- .name = "DDI C IO",
+ .name = "DDI_IO_C",
.domains = ICL_DDI_IO_C_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2001,7 +2001,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_DDI_C,
}
}, {
- .name = "DDI IO D_XELPD",
+ .name = "DDI_IO_D_XELPD",
.domains = XELPD_DDI_IO_D_XELPD_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2009,7 +2009,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_DDI_D,
}
}, {
- .name = "DDI IO E_XELPD",
+ .name = "DDI_IO_E_XELPD",
.domains = XELPD_DDI_IO_E_XELPD_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2017,7 +2017,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_DDI_E,
}
}, {
- .name = "DDI IO TC1",
+ .name = "DDI_IO_TC1",
.domains = XELPD_DDI_IO_TC1_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2025,7 +2025,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC1,
}
}, {
- .name = "DDI IO TC2",
+ .name = "DDI_IO_TC2",
.domains = XELPD_DDI_IO_TC2_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2033,7 +2033,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC2,
}
}, {
- .name = "DDI IO TC3",
+ .name = "DDI_IO_TC3",
.domains = XELPD_DDI_IO_TC3_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2041,7 +2041,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC3,
}
}, {
- .name = "DDI IO TC4",
+ .name = "DDI_IO_TC4",
.domains = XELPD_DDI_IO_TC4_POWER_DOMAINS,
.ops = &icl_ddi_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2049,7 +2049,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_DDI_TC4,
}
}, {
- .name = "AUX A",
+ .name = "AUX_A",
.domains = ICL_AUX_A_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
@@ -2058,7 +2058,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_A,
},
}, {
- .name = "AUX B",
+ .name = "AUX_B",
.domains = ICL_AUX_B_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
@@ -2067,7 +2067,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_B,
},
}, {
- .name = "AUX C",
+ .name = "AUX_C",
.domains = TGL_AUX_C_IO_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
@@ -2076,7 +2076,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = ICL_PW_CTL_IDX_AUX_C,
},
}, {
- .name = "AUX D_XELPD",
+ .name = "AUX_D_XELPD",
.domains = XELPD_AUX_IO_D_XELPD_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
@@ -2085,7 +2085,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_AUX_D,
},
}, {
- .name = "AUX E_XELPD",
+ .name = "AUX_E_XELPD",
.domains = XELPD_AUX_IO_E_XELPD_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2093,7 +2093,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = XELPD_PW_CTL_IDX_AUX_E,
},
}, {
- .name = "AUX USBC1",
+ .name = "AUX_USBC1",
.domains = XELPD_AUX_IO_USBC1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.fixed_enable_delay = true,
@@ -2102,7 +2102,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC1,
},
}, {
- .name = "AUX USBC2",
+ .name = "AUX_USBC2",
.domains = XELPD_AUX_IO_USBC2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2110,7 +2110,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC2,
},
}, {
- .name = "AUX USBC3",
+ .name = "AUX_USBC3",
.domains = XELPD_AUX_IO_USBC3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2118,7 +2118,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC3,
},
}, {
- .name = "AUX USBC4",
+ .name = "AUX_USBC4",
.domains = XELPD_AUX_IO_USBC4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.id = DISP_PW_ID_NONE,
@@ -2126,7 +2126,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TC4,
},
}, {
- .name = "AUX TBT1",
+ .name = "AUX_TBT1",
.domains = XELPD_AUX_IO_TBT1_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -2135,7 +2135,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT1,
},
}, {
- .name = "AUX TBT2",
+ .name = "AUX_TBT2",
.domains = XELPD_AUX_IO_TBT2_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -2144,7 +2144,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT2,
},
}, {
- .name = "AUX TBT3",
+ .name = "AUX_TBT3",
.domains = XELPD_AUX_IO_TBT3_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
@@ -2153,7 +2153,7 @@ static const struct i915_power_well_desc xelpd_power_wells[] = {
.hsw.idx = TGL_PW_CTL_IDX_AUX_TBT3,
},
}, {
- .name = "AUX TBT4",
+ .name = "AUX_TBT4",
.domains = XELPD_AUX_IO_TBT4_POWER_DOMAINS,
.ops = &icl_aux_power_well_ops,
.is_tc_tbt = true,
--
2.27.0
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