[PATCH 2/2] drm/i915/ttm: remove dmabuf gem backend and discrete gem ops
Adrian Larumbe
adrian.larumbe at collabora.com
Wed Jun 22 11:55:59 UTC 2022
Also move dmabuf object creation into ttm.
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 43 +--------
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 22 +++--
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 100 +++++++++++++--------
drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 3 +-
4 files changed, 83 insertions(+), 85 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index 3017d5569d21..7d684788e230 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -238,10 +238,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int flags)
struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
struct dma_buf *dma_buf)
{
- static struct lock_class_key lock_class;
- struct dma_buf_attachment *attach;
struct drm_i915_gem_object *obj;
- int ret;
/* is this one of own objects? */
if (dma_buf->ops == &i915_dmabuf_ops) {
@@ -257,45 +254,7 @@ struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
}
}
- if (i915_gem_object_size_2big(dma_buf->size))
- return ERR_PTR(-E2BIG);
-
- /* need to attach */
- attach = dma_buf_attach(dma_buf, dev->dev);
- if (IS_ERR(attach))
- return ERR_CAST(attach);
-
- get_dma_buf(dma_buf);
-
- obj = i915_gem_object_alloc();
- if (obj == NULL) {
- ret = -ENOMEM;
- goto fail_detach;
- }
-
- drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
- i915_gem_object_init(obj, gem_obj_ops(to_i915(obj->base.dev)),
- &lock_class, I915_BO_ALLOC_USER);
- obj->base.import_attach = attach;
- obj->base.resv = dma_buf->resv;
-
- /* We use GTT as shorthand for a coherent domain, one that is
- * neither in the GPU cache nor in the CPU cache, where all
- * writes are immediately visible in memory. (That's not strictly
- * true, but it's close! There are internal buffers such as the
- * write-combined buffer or a delay through the chipset for GTT
- * writes that do require us to treat GTT as a separate cache domain.)
- */
- obj->read_domains = I915_GEM_DOMAIN_GTT;
- obj->write_domain = 0;
-
- return &obj->base;
-
-fail_detach:
- dma_buf_detach(dma_buf, attach);
- dma_buf_put(dma_buf);
-
- return ERR_PTR(ret);
+ return i915_gem_ttm_create_dmabuf_obj(dev, dma_buf);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 7994756e7f78..0693a6fd63c4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -560,9 +560,10 @@ void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
{
+ struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
struct i915_mmap_offset *mmo, *mn;
- if (obj->ops->unmap_virtual)
+ if (obj->ops->unmap_virtual && (bo->type == ttm_bo_type_device))
obj->ops->unmap_virtual(obj);
spin_lock(&obj->mmo.lock);
@@ -650,10 +651,12 @@ mmap_offset_attach(struct drm_i915_gem_object *obj,
struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
struct i915_mmap_offset *mmo;
int err;
- GEM_BUG_ON(obj->ops->mmap_offset || obj->ops->mmap_ops);
+ GEM_BUG_ON((bo->type == ttm_bo_type_kernel) &&
+ (obj->ops->mmap_offset || obj->ops->mmap_ops));
mmo = lookup_mmo(obj, mmap_type);
if (mmo)
@@ -702,12 +705,14 @@ __assign_mmap_offset(struct drm_i915_gem_object *obj,
enum i915_mmap_type mmap_type,
u64 *offset, struct drm_file *file)
{
+ struct ttm_buffer_object *bo = i915_gem_to_ttm(obj);
struct i915_mmap_offset *mmo;
if (i915_gem_object_never_mmap(obj))
return -ENODEV;
- if (obj->ops->mmap_offset) {
+ if (obj->ops->mmap_offset &&
+ bo->type == ttm_bo_type_device) {
if (mmap_type != I915_MMAP_TYPE_FIXED)
return -ENODEV;
@@ -932,6 +937,7 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
struct drm_device *dev = priv->minor->dev;
struct drm_i915_gem_object *obj = NULL;
struct i915_mmap_offset *mmo = NULL;
+ struct ttm_buffer_object *bo;
struct file *anon;
if (drm_dev_is_unplugged(dev))
@@ -951,14 +957,16 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
if (!node->driver_private) {
mmo = container_of(node, struct i915_mmap_offset, vma_node);
obj = i915_gem_object_get_rcu(mmo->obj);
+ bo = i915_gem_to_ttm(obj);
- GEM_BUG_ON(obj && obj->ops->mmap_ops);
+ GEM_BUG_ON(obj && (bo->type == ttm_bo_type_kernel) && obj->ops->mmap_ops);
} else {
obj = i915_gem_object_get_rcu
(container_of(node, struct drm_i915_gem_object,
base.vma_node));
+ bo = i915_gem_to_ttm(obj);
- GEM_BUG_ON(obj && !obj->ops->mmap_ops);
+ GEM_BUG_ON(obj && (bo->type == ttm_bo_type_device) && !obj->ops->mmap_ops);
}
}
drm_vma_offset_unlock_lookup(dev->vma_offset_manager);
@@ -974,6 +982,8 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
vma->vm_flags &= ~VM_MAYWRITE;
}
+ bo = i915_gem_to_ttm(obj);
+
anon = mmap_singleton(to_i915(dev));
if (IS_ERR(anon)) {
i915_gem_object_put(obj);
@@ -994,7 +1004,7 @@ int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
/* Drop the initial creation reference, the vma is now holding one. */
fput(anon);
- if (obj->ops->mmap_ops) {
+ if (obj->ops->mmap_ops && (bo->type == ttm_bo_type_device)) {
vma->vm_page_prot = pgprot_decrypted(vm_get_page_prot(vma->vm_flags));
vma->vm_ops = obj->ops->mmap_ops;
vma->vm_private_data = node->driver_private;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index bdf3cd7f0b7f..ba31f239d775 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -920,8 +920,8 @@ static int i915_ttm_get_pages(struct drm_i915_gem_object *obj)
struct ttm_place requested, busy[I915_TTM_MAX_PLACEMENTS];
struct ttm_placement placement;
- if (obj->base.import_attach)
- return i915_gem_object_get_pages_dmabuf(&obj->base);
+ if (obj->base.import_attach)
+ return i915_gem_object_get_pages_dmabuf(&obj->base);
GEM_BUG_ON(obj->mm.n_placements > I915_TTM_MAX_PLACEMENTS);
@@ -1376,6 +1376,9 @@ static const struct drm_i915_gem_object_ops i915_gem_ttm_discrete_ops = {
.truncate = i915_ttm_truncate,
.shrink = i915_ttm_shrink,
+ .pwrite = i915_ttm_pwrite,
+ .pread = i915_ttm_pread,
+
.adjust_lru = i915_ttm_adjust_lru,
.delayed_free = i915_ttm_delayed_free,
.migrate = i915_ttm_migrate,
@@ -1385,32 +1388,6 @@ static const struct drm_i915_gem_object_ops i915_gem_ttm_discrete_ops = {
.mmap_ops = &vm_ops_ttm,
};
-static const struct drm_i915_gem_object_ops i915_gem_ttm_obj_integrated_ops = {
- .name = "i915_gem_object_ttm",
- .flags = I915_GEM_OBJECT_IS_SHRINKABLE |
- I915_GEM_OBJECT_SELF_MANAGED_SHRINK_LIST,
-
- .get_pages = i915_ttm_get_pages,
- .put_pages = i915_ttm_put_pages,
- .truncate = i915_ttm_truncate,
- .shrink = i915_ttm_shrink,
-
- .pwrite = i915_ttm_pwrite,
- .pread = i915_ttm_pread,
-
- .adjust_lru = i915_ttm_adjust_lru,
- .delayed_free = i915_ttm_delayed_free,
-};
-
-const struct drm_i915_gem_object_ops *gem_obj_ops(struct drm_i915_private *i915) {
- /*
- * if (IS_DGFX(i915))
- * return &i915_gem_ttm_discrete_ops;
- * else
- */
- return &i915_gem_ttm_obj_integrated_ops;
-}
-
void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
{
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
@@ -1489,11 +1466,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
drm_gem_private_object_init(&i915->drm, &obj->base, size);
- if (IS_DGFX(i915))
- i915_gem_object_init(obj, &i915_gem_ttm_discrete_ops, &lock_class, flags);
- else
- i915_gem_object_init(obj, &i915_gem_ttm_obj_integrated_ops, &lock_class,
- flags);
+ i915_gem_object_init(obj, &i915_gem_ttm_discrete_ops, &lock_class, flags);
obj->bo_offset = offset;
@@ -1503,7 +1476,7 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
INIT_RADIX_TREE(&obj->ttm.get_io_page.radix, GFP_KERNEL | __GFP_NOWARN);
mutex_init(&obj->ttm.get_io_page.lock);
- bo_type = (obj->ops->mmap_offset && (obj->flags & I915_BO_ALLOC_USER)) ?
+ bo_type = (IS_DGFX(i915) && (obj->flags & I915_BO_ALLOC_USER)) ?
ttm_bo_type_device : ttm_bo_type_kernel;
obj->base.vma_node.driver_private = i915_gem_to_ttm(obj);
@@ -1622,6 +1595,61 @@ bool i915_gem_object_is_shmem(struct drm_i915_gem_object *obj)
assert_object_held(obj);
#endif
- return mr && (mr->type == INTEL_MEMORY_SYSTEM &&
- obj->ops == &i915_gem_ttm_obj_integrated_ops);
+ return mr && (mr->type == INTEL_MEMORY_SYSTEM);
+}
+
+struct drm_gem_object *i915_gem_ttm_create_dmabuf_obj(struct drm_device *dev,
+ struct dma_buf *dma_buf)
+{
+ static struct lock_class_key lock_class;
+ struct dma_buf_attachment *attach;
+ struct drm_i915_gem_object *obj;
+ struct ttm_buffer_object *bo;
+
+
+ int ret;
+
+ if (i915_gem_object_size_2big(dma_buf->size))
+ return ERR_PTR(-E2BIG);
+
+ /* need to attach */
+ attach = dma_buf_attach(dma_buf, dev->dev);
+ if (IS_ERR(attach))
+ return ERR_CAST(attach);
+
+ get_dma_buf(dma_buf);
+
+ obj = i915_gem_object_alloc();
+ if (obj == NULL) {
+ ret = -ENOMEM;
+ goto fail_detach;
+ }
+
+ drm_gem_private_object_init(dev, &obj->base, dma_buf->size);
+ i915_gem_object_init(obj, &i915_gem_ttm_discrete_ops,
+ &lock_class, I915_BO_ALLOC_USER);
+ obj->base.import_attach = attach;
+ obj->base.resv = dma_buf->resv;
+
+ /* We use GTT as shorthand for a coherent domain, one that is
+ * neither in the GPU cache nor in the CPU cache, where all
+ * writes are immediately visible in memory. (That's not strictly
+ * true, but it's close! There are internal buffers such as the
+ * write-combined buffer or a delay through the chipset for GTT
+ * writes that do require us to treat GTT as a separate cache domain.)
+ */
+ obj->read_domains = I915_GEM_DOMAIN_GTT;
+ obj->write_domain = 0;
+
+ /* This is to avoid having the driver map the bo itself */
+ bo = i915_gem_to_ttm(obj);
+ bo->type = ttm_bo_type_kernel;
+
+ return &obj->base;
+
+fail_detach:
+ dma_buf_detach(dma_buf, attach);
+ dma_buf_put(dma_buf);
+
+ return ERR_PTR(ret);
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
index 1d9b1b5d1645..80d60d7a41c9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.h
@@ -95,6 +95,7 @@ static inline bool i915_ttm_cpu_maps_iomem(struct ttm_resource *mem)
struct file *i915_gem_ttm_get_filep(struct drm_i915_gem_object *obj);
-const struct drm_i915_gem_object_ops *gem_obj_ops(struct drm_i915_private *i915);
+struct drm_gem_object *i915_gem_ttm_create_dmabuf_obj(struct drm_device *dev,
+ struct dma_buf *dma_buf);
#endif
--
2.36.1
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