[PATCH 07/11] drm/i915/gmbus: Set SCDC_RR interrupt during GPIO xfers

[Ankit Nautiyal]

Disable/Enable SCDC_RR pre and post GPIO xfer.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_gmbus.c | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index ab5ae56f8a09..9ba7c923802d 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -298,6 +298,27 @@ static void set_data(void *data, int state_high)
 	intel_uncore_posting_read(uncore, bus->gpio_reg);
 }
 
+static void
+set_scdc(struct drm_i915_private *dev_priv, enum scdc_pin pin, bool enable)
+{
+	u32 scdc_bit;
+
+	if (pin == SCDC_PORT_NONE)
+		return;
+
+	if (DISPLAY_VER(dev_priv) < 11)
+		return;
+
+	scdc_bit = dev_priv->scdc_rr.scdc[pin];
+
+	spin_lock_irq(&dev_priv->irq_lock);
+	if (enable)
+		ibx_enable_display_interrupt(dev_priv, scdc_bit);
+	else
+		ibx_disable_display_interrupt(dev_priv, scdc_bit);
+	spin_unlock_irq(&dev_priv->irq_lock);
+}
+
 static int
 intel_gpio_pre_xfer(struct i2c_adapter *adapter)
 {
@@ -308,6 +329,8 @@ intel_gpio_pre_xfer(struct i2c_adapter *adapter)
 
 	intel_gmbus_reset(dev_priv);
 
+	set_scdc(dev_priv, bus->scdc_port, false);
+
 	if (IS_PINEVIEW(dev_priv))
 		pnv_gmbus_clock_gating(dev_priv, false);
 
@@ -328,6 +351,8 @@ intel_gpio_post_xfer(struct i2c_adapter *adapter)
 	set_data(bus, 1);
 	set_clock(bus, 1);
 
+	set_scdc(dev_priv, bus->scdc_port, true);
+
 	if (IS_PINEVIEW(dev_priv))
 		pnv_gmbus_clock_gating(dev_priv, true);
 }
-- 
2.25.1