[PATCH 7/7] [TEST] explicitly set cache level for internal buffers

Robert Beckett bob.beckett at collabora.com
Wed May 25 20:57:52 UTC 2022


by default i915_ttm_cache_level() decides I915_CACHE_LLC if HAS_SNOOP.
this is divergent from existing internal code which only considers
HAS_LLC.

check to see if this fixes gen3-5 for gem_exec_create at basic@smem
and other hangs.
---
 drivers/gpu/drm/i915/gem/i915_gem_internal.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
index a83751867ac7..c0778dcfd965 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
@@ -27,7 +27,17 @@ struct drm_i915_gem_object *
 i915_gem_object_create_internal(struct drm_i915_private *i915,
 				phys_addr_t size)
 {
-	return i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_INTERNAL],
-					     size, 0, I915_BO_ALLOC_VOLATILE);
+	struct drm_i915_gem_object *obj;
+	unsigned int cache_level;
+
+	obj = i915_gem_object_create_region(i915->mm.regions[INTEL_REGION_INTERNAL],
+					    size, 0, I915_BO_ALLOC_VOLATILE);
+	if (IS_ERR(obj))
+		return obj;
+
+	cache_level = HAS_LLC(i915) ? I915_CACHE_LLC : I915_CACHE_NONE;
+	i915_gem_object_set_cache_coherency(obj, cache_level);
+
+	return obj;
 }
 
-- 
2.25.1



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