[PATCH 9/9] [TEST][WIP] make spinners respect HAS_LLC for hws

[Robert Beckett]

---
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c      | 10 +++++++
 drivers/gpu/drm/i915/selftests/igt_spinner.c | 31 ++++++++++++++++----
 2 files changed, 36 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index dff4cd68cd78..bbbd203bca73 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -1242,6 +1242,16 @@ int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
 	i915_gem_object_init_memory_region(obj, mem);
 	i915_ttm_adjust_domains_after_move(obj);
 	i915_ttm_adjust_gem_after_move(obj);
+#if 0
+	pr_info("BOB_DEBUG: %s(): obj=%px bo->ttm->caching=%d obj->write_domain=%u "
+		"obj->read_domains=%u obj->cache_level=%u obj->cache_coherent=0x%x "
+		"obj->cache_dirty=%u HAS_LLC=%d binds_lmem=%d mem_type=%d\n",
+			__func__, obj, i915_gem_to_ttm(obj)->ttm->caching, obj->write_domain,
+			obj->read_domains, obj->cache_level, obj->cache_coherent,
+			obj->cache_dirty, HAS_LLC(i915),
+			i915_ttm_gtt_binds_lmem(i915_gem_to_ttm(obj)->resource),
+			i915_gem_to_ttm(obj)->resource->mem_type);
+#endif
 	i915_gem_object_unlock(obj);
 
 	return 0;
diff --git a/drivers/gpu/drm/i915/selftests/igt_spinner.c b/drivers/gpu/drm/i915/selftests/igt_spinner.c
index 0c22594ae274..fb707c95de4d 100644
--- a/drivers/gpu/drm/i915/selftests/igt_spinner.c
+++ b/drivers/gpu/drm/i915/selftests/igt_spinner.c
@@ -8,6 +8,8 @@
 
 #include "gem/i915_gem_internal.h"
 #include "gem/selftests/igt_gem_utils.h"
+#include <drm/ttm/ttm_bo_driver.h>
+#include "gem/i915_gem_ttm.h"
 
 #include "igt_spinner.h"
 
@@ -23,13 +25,33 @@ int igt_spinner_init(struct igt_spinner *spin, struct intel_gt *gt)
 		err = PTR_ERR(spin->hws);
 		goto err;
 	}
-	i915_gem_object_set_cache_coherency(spin->hws, I915_CACHE_LLC);
+	i915_gem_object_set_cache_coherency(spin->hws, HAS_LLC(gt->i915) ? I915_CACHE_LLC : I915_CACHE_NONE);
+#if 0
+	pr_info("BOB_DEBUG: %s(): spin->hws=%px bo->ttm->caching=%d spin->hws->write_domain=%u "
+		"spin->hws->read_domains=%u spin->hws->cache_level=%u spin->hws->cache_coherent=0x%x "
+		"spin->hws->cache_dirty=%u HAS_LLC=%d binds_lmem=%d mem_type=%d\n",
+			__func__, spin->hws, i915_gem_to_ttm(spin->hws)->ttm->caching, spin->hws->write_domain,
+			spin->hws->read_domains, spin->hws->cache_level, spin->hws->cache_coherent,
+			spin->hws->cache_dirty, HAS_LLC(gt->i915),
+			i915_ttm_gtt_binds_lmem(i915_gem_to_ttm(spin->hws)->resource),
+			i915_gem_to_ttm(spin->hws)->resource->mem_type);
+#endif
 
 	spin->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE);
 	if (IS_ERR(spin->obj)) {
 		err = PTR_ERR(spin->obj);
 		goto err_hws;
 	}
+#if 0
+	pr_info("BOB_DEBUG: %s(): spin->obj=%px bo->ttm->caching=%d spin->obj->write_domain=%u "
+		"spin->obj->read_domains=%u spin->obj->cache_level=%u spin->obj->cache_coherent=0x%x "
+		"spin->obj->cache_dirty=%u HAS_LLC=%d binds_lmem=%d mem_type=%d\n",
+			__func__, spin->obj, i915_gem_to_ttm(spin->obj)->ttm->caching, spin->obj->write_domain,
+			spin->obj->read_domains, spin->obj->cache_level, spin->obj->cache_coherent,
+			spin->obj->cache_dirty, HAS_LLC(gt->i915),
+			i915_ttm_gtt_binds_lmem(i915_gem_to_ttm(spin->obj)->resource),
+			i915_gem_to_ttm(spin->obj)->resource->mem_type);
+#endif
 
 	return 0;
 
@@ -81,13 +103,15 @@ int igt_spinner_pin(struct igt_spinner *spin,
 		    struct i915_gem_ww_ctx *ww)
 {
 	void *vaddr;
+	unsigned int mode;
 
 	if (spin->ce && WARN_ON(spin->ce != ce))
 		return -ENODEV;
 	spin->ce = ce;
 
+	mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
 	if (!spin->seqno) {
-		vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, I915_MAP_WB, &spin->hws_vma);
+		vaddr = igt_spinner_pin_obj(ce, ww, spin->hws, mode, &spin->hws_vma);
 		if (IS_ERR(vaddr))
 			return PTR_ERR(vaddr);
 
@@ -95,9 +119,6 @@ int igt_spinner_pin(struct igt_spinner *spin,
 	}
 
 	if (!spin->batch) {
-		unsigned int mode;
-
-		mode = i915_coherent_map_type(spin->gt->i915, spin->obj, false);
 		vaddr = igt_spinner_pin_obj(ce, ww, spin->obj, mode, &spin->batch_vma);
 		if (IS_ERR(vaddr))
 			return PTR_ERR(vaddr);
-- 
2.25.1