[PATCH 3/3] drm/i915/display: CDCLK 0 scenario

[Anusha Srivatsa]

In cases where we are still enabling display, when cdclk is 0
do a modeset and not a squash.

Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 53f7a4a04d95..beb1fc80d4ea 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1685,7 +1685,7 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
 	const struct intel_cdclk_vals *table = dev_priv->display.cdclk.table;
 	int i;
 
-	if (cdclk == dev_priv->display.cdclk.hw.bypass)
+	if (cdclk == dev_priv->display.cdclk.hw.bypass || cdclk == 0)
 		return 0;
 
 	for (i = 0; table[i].refclk; i++)
-- 
2.25.1