[PATCH 1/3] drm/i915/display: Do both crawl and squash when changing cdclk

[Ville Syrjälä]

On Tue, Oct 11, 2022 at 11:26:08PM +0000, Srivatsa, Anusha wrote:
> 
> 
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > Sent: Tuesday, October 11, 2022 12:33 AM
> > To: Srivatsa, Anusha <anusha.srivatsa at intel.com>
> > Cc: intel-gfx-trybot at lists.freedesktop.org
> > Subject: Re: [PATCH 1/3] drm/i915/display: Do both crawl and squash when
> > changing cdclk
> > 
> > On Mon, Oct 10, 2022 at 03:21:02PM -0700, Anusha Srivatsa wrote:
> > > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > >
> > > For MTL, changing cdclk from between certain frequencies has both
> > > squash and crawl. Use the current cdclk config and the new(desired)
> > > cdclk config to construtc a mid cdclk config.
> > > Set the cdclk twice:
> > > - Current cdclk -> mid cdclk
> > > - mid cdclk -> desired cdclk
> > >
> > > v2: Add check in intel_modeset_calc_cdclk() to avoid cdclk change via
> > > modeset for platforms that support squash_crawl sequences(Ville)
> > >
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_cdclk.c | 144
> > > +++++++++++++++++----
> > >  1 file changed, 116 insertions(+), 28 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > index ad401357ab66..cf7be2f9ea02 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > @@ -1689,37 +1689,68 @@ static u32 cdclk_squash_waveform(struct
> > drm_i915_private *dev_priv,
> > >  	return 0xffff;
> > >  }
> > >
> > > -static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
> > > -			  const struct intel_cdclk_config *cdclk_config,
> > > -			  enum pipe pipe)
> > > +static int cdclk_squash_divider(u16 waveform) {
> > > +	return hweight16(waveform ?: 0xffff); }
> > > +
> > > +static bool cdclk_crawl_and_squash(struct drm_i915_private *i915,
> > > +				   const struct intel_cdclk_config
> > *old_cdclk_config,
> > > +				   const struct intel_cdclk_config
> > *new_cdclk_config,
> > > +				   struct intel_cdclk_config *mid_cdclk_config)
> > {
> > > +	u16 old_waveform = cdclk_squash_waveform(i915, old_cdclk_config-
> > >cdclk);
> > > +	u16 new_waveform = cdclk_squash_waveform(i915,
> > new_cdclk_config->cdclk);
> > > +	u16 mid_waveform;
> > > +	int size = 16;
> > > +	int div = 2;
> > > +
> > 
> > This is missing the check for the hw caps.
> 
> Like min bw and slow clock per platform?

No. Crawl and squash.

-- 
Ville Syrjälä
Intel