[PATCH 4/4] HAX wip debugging + messages for igt analysis

Alan Previn alan.previn.teres.alexis at intel.com
Fri Sep 9 17:07:24 UTC 2022


HAX wip debugging + messages for igt analysis
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 13 ++++++++++++-
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index bef984c585ff..caeb310575ef 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -1543,6 +1543,7 @@ static void guc_flush_submissions(struct intel_guc *guc)
 	spin_unlock_irqrestore(&sched_engine->lock, flags);
 }
 
+static int mid_reset_during_flush = 0;
 static void guc_flush_destroyed_contexts(struct intel_guc *guc);
 static void guc_flush_all_delayed_disable_sched_contexts(struct intel_guc *guc);
 
@@ -3072,7 +3073,11 @@ static void __delay_sched_disable(struct work_struct *wrk)
 	if (bypass_sched_disable(guc, ce)) {
 		spin_unlock_irqrestore(&ce->guc_state.lock, flags);
 		intel_context_sched_disable_unpin(ce);
+		if (mid_reset_during_flush)
+			DRM_INFO("ALANPREVIN delay-disable-worker immmediate unpin");
 	} else {
+		if (mid_reset_during_flush)
+			DRM_INFO("ALANPREVIN delay-disable-worker do-disable");
 		do_sched_disable(guc, ce, flags);
 	}
 }
@@ -3121,20 +3126,26 @@ static void guc_flush_all_delayed_disable_sched_contexts(struct intel_guc *guc)
 	unsigned long index;
 	unsigned long flags;
 	unsigned long ceflags;
+	u16 guc_id;
 
 	xa_lock_irqsave(&guc->context_lookup, flags);
+	DRM_INFO("ALANPREVIN - start flushing all delay-disable workers");
+	mid_reset_during_flush = 1;
 	xa_for_each(&guc->context_lookup, index, ce) {
 		if (!kref_get_unless_zero(&ce->ref))
 			continue;
 		xa_unlock(&guc->context_lookup);
 		if (cancel_delayed_work(&ce->guc_state.sched_disable_delay)) {
+			DRM_INFO("ALANPREVIN - context with cancelled delay-disable");
 			spin_lock_irqsave(&ce->guc_state.lock, ceflags);
+			guc_id = prep_context_pending_disable(ce);
 			spin_unlock_irqrestore(&ce->guc_state.lock, ceflags);
-			intel_context_sched_disable_unpin(ce);
 		}
 		intel_context_put(ce);
 		xa_lock(&guc->context_lookup);
 	}
+	mid_reset_during_flush = 0;
+	DRM_INFO("ALANPREVIN - done flushing all delay-disable workers");
 	xa_unlock_irqrestore(&guc->context_lookup, flags);
 }
 
-- 
2.25.1



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