[PATCH 11/11] HAX: Limit CI testing to just a couple platforms
Matt Roper
matthew.d.roper at intel.com
Tue Sep 13 14:50:56 UTC 2022
Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
---
drivers/gpu/drm/i915/i915_pci.c | 131 ++++++++++++++------------------
1 file changed, 59 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 77e7df21f539..3ffb5525a420 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -212,22 +212,26 @@
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
+__maybe_unused
static const struct intel_device_info i830_info = {
I830_FEATURES,
PLATFORM(INTEL_I830),
};
+__maybe_unused
static const struct intel_device_info i845g_info = {
I845_FEATURES,
PLATFORM(INTEL_I845G),
};
+__maybe_unused
static const struct intel_device_info i85x_info = {
I830_FEATURES,
PLATFORM(INTEL_I85X),
.__runtime.fbc_mask = BIT(INTEL_FBC_A),
};
+__maybe_unused
static const struct intel_device_info i865g_info = {
I845_FEATURES,
PLATFORM(INTEL_I865G),
@@ -251,6 +255,7 @@ static const struct intel_device_info i865g_info = {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
+__maybe_unused
static const struct intel_device_info i915g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I915G),
@@ -262,6 +267,7 @@ static const struct intel_device_info i915g_info = {
.unfenced_needs_alignment = 1,
};
+__maybe_unused
static const struct intel_device_info i915gm_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I915GM),
@@ -275,6 +281,7 @@ static const struct intel_device_info i915gm_info = {
.unfenced_needs_alignment = 1,
};
+__maybe_unused
static const struct intel_device_info i945g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I945G),
@@ -286,6 +293,7 @@ static const struct intel_device_info i945g_info = {
.unfenced_needs_alignment = 1,
};
+__maybe_unused
static const struct intel_device_info i945gm_info = {
GEN3_FEATURES,
PLATFORM(INTEL_I945GM),
@@ -300,6 +308,7 @@ static const struct intel_device_info i945gm_info = {
.unfenced_needs_alignment = 1,
};
+__maybe_unused
static const struct intel_device_info g33_info = {
GEN3_FEATURES,
PLATFORM(INTEL_G33),
@@ -308,6 +317,7 @@ static const struct intel_device_info g33_info = {
.dma_mask_size = 36,
};
+__maybe_unused
static const struct intel_device_info pnv_g_info = {
GEN3_FEATURES,
PLATFORM(INTEL_PINEVIEW),
@@ -316,6 +326,7 @@ static const struct intel_device_info pnv_g_info = {
.dma_mask_size = 36,
};
+__maybe_unused
static const struct intel_device_info pnv_m_info = {
GEN3_FEATURES,
PLATFORM(INTEL_PINEVIEW),
@@ -343,6 +354,7 @@ static const struct intel_device_info pnv_m_info = {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
+__maybe_unused
static const struct intel_device_info i965g_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965G),
@@ -351,6 +363,7 @@ static const struct intel_device_info i965g_info = {
.has_snoop = false,
};
+__maybe_unused
static const struct intel_device_info i965gm_info = {
GEN4_FEATURES,
PLATFORM(INTEL_I965GM),
@@ -362,6 +375,7 @@ static const struct intel_device_info i965gm_info = {
.has_snoop = false,
};
+__maybe_unused
static const struct intel_device_info g45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_G45),
@@ -369,6 +383,7 @@ static const struct intel_device_info g45_info = {
.gpu_reset_clobbers_display = false,
};
+__maybe_unused
static const struct intel_device_info gm45_info = {
GEN4_FEATURES,
PLATFORM(INTEL_GM45),
@@ -397,11 +412,13 @@ static const struct intel_device_info gm45_info = {
GEN_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
+__maybe_unused
static const struct intel_device_info ilk_d_info = {
GEN5_FEATURES,
PLATFORM(INTEL_IRONLAKE),
};
+__maybe_unused
static const struct intel_device_info ilk_m_info = {
GEN5_FEATURES,
PLATFORM(INTEL_IRONLAKE),
@@ -436,11 +453,13 @@ static const struct intel_device_info ilk_m_info = {
GEN6_FEATURES, \
PLATFORM(INTEL_SANDYBRIDGE)
+__maybe_unused
static const struct intel_device_info snb_d_gt1_info = {
SNB_D_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info snb_d_gt2_info = {
SNB_D_PLATFORM,
.gt = 2,
@@ -452,11 +471,13 @@ static const struct intel_device_info snb_d_gt2_info = {
.is_mobile = 1
+__maybe_unused
static const struct intel_device_info snb_m_gt1_info = {
SNB_M_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info snb_m_gt2_info = {
SNB_M_PLATFORM,
.gt = 2,
@@ -490,11 +511,13 @@ static const struct intel_device_info snb_m_gt2_info = {
PLATFORM(INTEL_IVYBRIDGE), \
.has_l3_dpf = 1
+__maybe_unused
static const struct intel_device_info ivb_d_gt1_info = {
IVB_D_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info ivb_d_gt2_info = {
IVB_D_PLATFORM,
.gt = 2,
@@ -506,16 +529,19 @@ static const struct intel_device_info ivb_d_gt2_info = {
.is_mobile = 1, \
.has_l3_dpf = 1
+__maybe_unused
static const struct intel_device_info ivb_m_gt1_info = {
IVB_M_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info ivb_m_gt2_info = {
IVB_M_PLATFORM,
.gt = 2,
};
+__maybe_unused
static const struct intel_device_info ivb_q_info = {
GEN7_FEATURES,
PLATFORM(INTEL_IVYBRIDGE),
@@ -525,6 +551,7 @@ static const struct intel_device_info ivb_q_info = {
.has_l3_dpf = 1,
};
+__maybe_unused
static const struct intel_device_info vlv_info = {
PLATFORM(INTEL_VALLEYVIEW),
GEN(7),
@@ -568,16 +595,19 @@ static const struct intel_device_info vlv_info = {
PLATFORM(INTEL_HASWELL), \
.has_l3_dpf = 1
+__maybe_unused
static const struct intel_device_info hsw_gt1_info = {
HSW_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info hsw_gt2_info = {
HSW_PLATFORM,
.gt = 2,
};
+__maybe_unused
static const struct intel_device_info hsw_gt3_info = {
HSW_PLATFORM,
.gt = 3,
@@ -596,16 +626,19 @@ static const struct intel_device_info hsw_gt3_info = {
GEN8_FEATURES, \
PLATFORM(INTEL_BROADWELL)
+__maybe_unused
static const struct intel_device_info bdw_gt1_info = {
BDW_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info bdw_gt2_info = {
BDW_PLATFORM,
.gt = 2,
};
+__maybe_unused
static const struct intel_device_info bdw_rsvd_info = {
BDW_PLATFORM,
.gt = 3,
@@ -614,6 +647,7 @@ static const struct intel_device_info bdw_rsvd_info = {
*/
};
+__maybe_unused
static const struct intel_device_info bdw_gt3_info = {
BDW_PLATFORM,
.gt = 3,
@@ -621,6 +655,7 @@ static const struct intel_device_info bdw_gt3_info = {
BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1),
};
+__maybe_unused
static const struct intel_device_info chv_info = {
PLATFORM(INTEL_CHERRYVIEW),
GEN(8),
@@ -670,11 +705,13 @@ static const struct intel_device_info chv_info = {
GEN9_FEATURES, \
PLATFORM(INTEL_SKYLAKE)
+__maybe_unused
static const struct intel_device_info skl_gt1_info = {
SKL_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info skl_gt2_info = {
SKL_PLATFORM,
.gt = 2,
@@ -686,11 +723,13 @@ static const struct intel_device_info skl_gt2_info = {
BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS1)
+__maybe_unused
static const struct intel_device_info skl_gt3_info = {
SKL_GT3_PLUS_PLATFORM,
.gt = 3,
};
+__maybe_unused
static const struct intel_device_info skl_gt4_info = {
SKL_GT3_PLUS_PLATFORM,
.gt = 4,
@@ -734,12 +773,14 @@ static const struct intel_device_info skl_gt4_info = {
GEN9_DEFAULT_PAGE_SIZES, \
GEN_DEFAULT_REGIONS
+__maybe_unused
static const struct intel_device_info bxt_info = {
GEN9_LP_FEATURES,
PLATFORM(INTEL_BROXTON),
.display.dbuf.size = 512 - 4, /* 4 blocks for bypass path allocation */
};
+__maybe_unused
static const struct intel_device_info glk_info = {
GEN9_LP_FEATURES,
PLATFORM(INTEL_GEMINILAKE),
@@ -752,16 +793,19 @@ static const struct intel_device_info glk_info = {
GEN9_FEATURES, \
PLATFORM(INTEL_KABYLAKE)
+__maybe_unused
static const struct intel_device_info kbl_gt1_info = {
KBL_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info kbl_gt2_info = {
KBL_PLATFORM,
.gt = 2,
};
+__maybe_unused
static const struct intel_device_info kbl_gt3_info = {
KBL_PLATFORM,
.gt = 3,
@@ -773,16 +817,19 @@ static const struct intel_device_info kbl_gt3_info = {
GEN9_FEATURES, \
PLATFORM(INTEL_COFFEELAKE)
+__maybe_unused
static const struct intel_device_info cfl_gt1_info = {
CFL_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info cfl_gt2_info = {
CFL_PLATFORM,
.gt = 2,
};
+__maybe_unused
static const struct intel_device_info cfl_gt3_info = {
CFL_PLATFORM,
.gt = 3,
@@ -794,11 +841,13 @@ static const struct intel_device_info cfl_gt3_info = {
GEN9_FEATURES, \
PLATFORM(INTEL_COMETLAKE)
+__maybe_unused
static const struct intel_device_info cml_gt1_info = {
CML_PLATFORM,
.gt = 1,
};
+__maybe_unused
static const struct intel_device_info cml_gt2_info = {
CML_PLATFORM,
.gt = 2,
@@ -840,6 +889,7 @@ static const struct intel_device_info cml_gt2_info = {
.has_coherent_ggtt = false, \
.has_logical_ring_elsq = 1
+__maybe_unused
static const struct intel_device_info icl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ICELAKE),
@@ -847,6 +897,7 @@ static const struct intel_device_info icl_info = {
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
};
+__maybe_unused
static const struct intel_device_info ehl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_ELKHARTLAKE),
@@ -854,6 +905,7 @@ static const struct intel_device_info ehl_info = {
.__runtime.ppgtt_size = 36,
};
+__maybe_unused
static const struct intel_device_info jsl_info = {
GEN11_FEATURES,
PLATFORM(INTEL_JASPERLAKE),
@@ -890,6 +942,7 @@ static const struct intel_device_info jsl_info = {
.has_pxp = 1, \
.display.has_dsb = 0 /* FIXME: LUT load is broken with DSB */
+__maybe_unused
static const struct intel_device_info tgl_info = {
GEN12_FEATURES,
PLATFORM(INTEL_TIGERLAKE),
@@ -898,6 +951,7 @@ static const struct intel_device_info tgl_info = {
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
};
+__maybe_unused
static const struct intel_device_info rkl_info = {
GEN12_FEATURES,
PLATFORM(INTEL_ROCKETLAKE),
@@ -919,6 +973,7 @@ static const struct intel_device_info rkl_info = {
.is_dgfx = 1, \
.has_heci_gscfi = 1
+__maybe_unused
static const struct intel_device_info dg1_info = {
GEN12_FEATURES,
DGFX_FEATURES,
@@ -933,6 +988,7 @@ static const struct intel_device_info dg1_info = {
.__runtime.ppgtt_size = 47,
};
+__maybe_unused
static const struct intel_device_info adl_s_info = {
GEN12_FEATURES,
PLATFORM(INTEL_ALDERLAKE_S),
@@ -985,6 +1041,7 @@ static const struct intel_device_info adl_s_info = {
}, \
TGL_CURSOR_OFFSETS
+__maybe_unused
static const struct intel_device_info adl_p_info = {
GEN12_FEATURES,
XE_LPD_FEATURES,
@@ -1071,6 +1128,7 @@ static const struct intel_device_info xehpsdv_info = {
BIT(VCS0) | BIT(VCS2) | \
BIT(CCS0) | BIT(CCS1) | BIT(CCS2) | BIT(CCS3)
+__maybe_unused
static const struct intel_device_info dg2_info = {
DG2_FEATURES,
XE_LPD_FEATURES,
@@ -1079,6 +1137,7 @@ static const struct intel_device_info dg2_info = {
.require_force_probe = 1,
};
+__maybe_unused
static const struct intel_device_info ats_m_info = {
DG2_FEATURES,
.display = { 0 },
@@ -1158,80 +1217,8 @@ static const struct intel_device_info mtl_info = {
* PCI ID matches, otherwise we'll use the wrong info struct above.
*/
static const struct pci_device_id pciidlist[] = {
- INTEL_I830_IDS(&i830_info),
- INTEL_I845G_IDS(&i845g_info),
- INTEL_I85X_IDS(&i85x_info),
- INTEL_I865G_IDS(&i865g_info),
- INTEL_I915G_IDS(&i915g_info),
- INTEL_I915GM_IDS(&i915gm_info),
- INTEL_I945G_IDS(&i945g_info),
- INTEL_I945GM_IDS(&i945gm_info),
- INTEL_I965G_IDS(&i965g_info),
- INTEL_G33_IDS(&g33_info),
- INTEL_I965GM_IDS(&i965gm_info),
- INTEL_GM45_IDS(&gm45_info),
- INTEL_G45_IDS(&g45_info),
- INTEL_PINEVIEW_G_IDS(&pnv_g_info),
- INTEL_PINEVIEW_M_IDS(&pnv_m_info),
- INTEL_IRONLAKE_D_IDS(&ilk_d_info),
- INTEL_IRONLAKE_M_IDS(&ilk_m_info),
- INTEL_SNB_D_GT1_IDS(&snb_d_gt1_info),
- INTEL_SNB_D_GT2_IDS(&snb_d_gt2_info),
- INTEL_SNB_M_GT1_IDS(&snb_m_gt1_info),
- INTEL_SNB_M_GT2_IDS(&snb_m_gt2_info),
- INTEL_IVB_Q_IDS(&ivb_q_info), /* must be first IVB */
- INTEL_IVB_M_GT1_IDS(&ivb_m_gt1_info),
- INTEL_IVB_M_GT2_IDS(&ivb_m_gt2_info),
- INTEL_IVB_D_GT1_IDS(&ivb_d_gt1_info),
- INTEL_IVB_D_GT2_IDS(&ivb_d_gt2_info),
- INTEL_HSW_GT1_IDS(&hsw_gt1_info),
- INTEL_HSW_GT2_IDS(&hsw_gt2_info),
- INTEL_HSW_GT3_IDS(&hsw_gt3_info),
- INTEL_VLV_IDS(&vlv_info),
- INTEL_BDW_GT1_IDS(&bdw_gt1_info),
- INTEL_BDW_GT2_IDS(&bdw_gt2_info),
- INTEL_BDW_GT3_IDS(&bdw_gt3_info),
- INTEL_BDW_RSVD_IDS(&bdw_rsvd_info),
- INTEL_CHV_IDS(&chv_info),
- INTEL_SKL_GT1_IDS(&skl_gt1_info),
- INTEL_SKL_GT2_IDS(&skl_gt2_info),
- INTEL_SKL_GT3_IDS(&skl_gt3_info),
- INTEL_SKL_GT4_IDS(&skl_gt4_info),
- INTEL_BXT_IDS(&bxt_info),
- INTEL_GLK_IDS(&glk_info),
- INTEL_KBL_GT1_IDS(&kbl_gt1_info),
- INTEL_KBL_GT2_IDS(&kbl_gt2_info),
- INTEL_KBL_GT3_IDS(&kbl_gt3_info),
- INTEL_KBL_GT4_IDS(&kbl_gt3_info),
- INTEL_AML_KBL_GT2_IDS(&kbl_gt2_info),
- INTEL_CFL_S_GT1_IDS(&cfl_gt1_info),
- INTEL_CFL_S_GT2_IDS(&cfl_gt2_info),
- INTEL_CFL_H_GT1_IDS(&cfl_gt1_info),
- INTEL_CFL_H_GT2_IDS(&cfl_gt2_info),
- INTEL_CFL_U_GT2_IDS(&cfl_gt2_info),
- INTEL_CFL_U_GT3_IDS(&cfl_gt3_info),
- INTEL_WHL_U_GT1_IDS(&cfl_gt1_info),
- INTEL_WHL_U_GT2_IDS(&cfl_gt2_info),
- INTEL_AML_CFL_GT2_IDS(&cfl_gt2_info),
- INTEL_WHL_U_GT3_IDS(&cfl_gt3_info),
- INTEL_CML_GT1_IDS(&cml_gt1_info),
- INTEL_CML_GT2_IDS(&cml_gt2_info),
- INTEL_CML_U_GT1_IDS(&cml_gt1_info),
- INTEL_CML_U_GT2_IDS(&cml_gt2_info),
- INTEL_ICL_11_IDS(&icl_info),
- INTEL_EHL_IDS(&ehl_info),
- INTEL_JSL_IDS(&jsl_info),
INTEL_TGL_12_IDS(&tgl_info),
INTEL_RKL_IDS(&rkl_info),
- INTEL_ADLS_IDS(&adl_s_info),
- INTEL_ADLP_IDS(&adl_p_info),
- INTEL_ADLN_IDS(&adl_p_info),
- INTEL_DG1_IDS(&dg1_info),
- INTEL_RPLS_IDS(&adl_s_info),
- INTEL_RPLP_IDS(&adl_p_info),
- INTEL_DG2_IDS(&dg2_info),
- INTEL_ATS_M_IDS(&ats_m_info),
- INTEL_MTL_IDS(&mtl_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
--
2.37.3
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