[PATCH 3/3] drm/i915: Enable GGTT blitting in MTL

[Nirmoy Das]

MTL can hang because of a HW bug while parallel reading/writing
from/to LMEM/GTTMMADR BAR so try to reduce GGTT update
related pci transactions with blitter command as recommended
for Wa_22018444074.

Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.c | 4 ++++
 drivers/gpu/drm/i915/gt/intel_reset.c | 3 ++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 5a942af0a14e..6448d187941a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -280,6 +280,9 @@ int intel_gt_resume(struct intel_gt *gt)
 out_fw:
 	intel_uncore_forcewake_put(gt->uncore, FORCEWAKE_ALL);
 	intel_gt_pm_put(gt);
+	if (!err)
+		intel_engine_blitter_context_set_ready(gt, true);
+
 	return err;
 
 err_wedged:
@@ -306,6 +309,7 @@ static void wait_for_suspend(struct intel_gt *gt)
 
 void intel_gt_suspend_prepare(struct intel_gt *gt)
 {
+	intel_engine_blitter_context_set_ready(gt, false);
 	user_forcewake(gt, true);
 	wait_for_suspend(gt);
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index cc6bd21a3e51..7f41fe0f3d11 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1011,7 +1011,7 @@ void intel_gt_set_wedged(struct intel_gt *gt)
 
 	if (test_bit(I915_WEDGED, &gt->reset.flags))
 		return;
-
+	intel_engine_blitter_context_set_ready(gt, false);
 	wakeref = intel_runtime_pm_get(gt->uncore->rpm);
 	mutex_lock(&gt->reset.mutex);
 
@@ -1114,6 +1114,7 @@ static bool __intel_gt_unset_wedged(struct intel_gt *gt)
 
 	smp_mb__before_atomic(); /* complete takeover before enabling execbuf */
 	clear_bit(I915_WEDGED, &gt->reset.flags);
+	intel_engine_blitter_context_set_ready(gt, true);
 
 	return true;
 }
-- 
2.39.0