[PATCH] drm/i915/psr: Calculate needed wake lines

Jouni Högander jouni.hogander at intel.com
Fri Feb 17 15:22:25 UTC 2023


Currently we are using hardcoded 7 for io wake lines and fastwake
lines. According to bspec io wake time is 50 us and fast wake time
is 42 us. Calculate common line count for these and use 50 us for
the calculation.

Bspec: 49274

Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 2954759e9d12..1b3bd905dc98 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -577,9 +577,12 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 		 * IO_BUFFER_WAKE and FAST_WAKE. And higher than 4K resolution
 		 * mode needs to increase IO_BUFFER_WAKE and FAST_WAKE.
 		 */
-		val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
-		val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(7);
-		val |= TGL_EDP_PSR2_FAST_WAKE(7);
+		if (intel_dp->psr.wake_lines < 9)
+			val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_2;
+		else
+			val |= TGL_EDP_PSR2_BLOCK_COUNT_NUM_3;
+		val |= TGL_EDP_PSR2_IO_BUFFER_WAKE(intel_dp->psr.wake_lines);
+		val |= TGL_EDP_PSR2_FAST_WAKE(intel_dp->psr.wake_lines);
 	} else if (DISPLAY_VER(dev_priv) >= 9) {
 		val |= EDP_PSR2_IO_BUFFER_WAKE(7);
 		val |= EDP_PSR2_FAST_WAKE(7);
@@ -1261,6 +1264,8 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	intel_psr_enable_source(intel_dp, crtc_state);
 	intel_dp->psr.enabled = true;
 	intel_dp->psr.paused = false;
+	intel_dp->psr.wake_lines =
+		intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 50);
 
 	intel_psr_activate(intel_dp);
 }
-- 
2.34.1



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