[PATCH i-g-t 2/2] perf: initial changes for testing XE OA
Ashutosh Dixit
ashutosh.dixit at intel.com
Wed Jul 5 18:06:45 UTC 2023
Current issues from above tests:
* unlanded report(s) head=0x0 tail=0x0 hw_tail=0x764100
* "blocking": Failed assertion: kernel_ns <= (test_duration_ns / 100ull)
Signed-off-by: Ashutosh Dixit <ashutosh.dixit at intel.com>
---
lib/i915/perf.c | 169 +++++++++++++++++++++++++++++++++-
lib/i915/perf.h | 1 +
lib/meson.build | 2 +-
lib/xe/xe_query.c | 8 ++
lib/xe/xe_query.h | 1 +
tests/i915/perf.c | 229 +++++++++++++++++++++++++++++++---------------
6 files changed, 333 insertions(+), 77 deletions(-)
diff --git a/lib/i915/perf.c b/lib/i915/perf.c
index ddadb53b61c8..8a3f696f4b39 100644
--- a/lib/i915/perf.c
+++ b/lib/i915/perf.c
@@ -37,10 +37,14 @@
#include <i915_drm.h>
+#include "drmtest.h"
+#include "igt_aux.h"
#include "i915_pciids.h"
-
#include "intel_chipset.h"
+#include "ioctl_wrappers.h"
+#include "linux_scaffold.h"
#include "perf.h"
+#include "xe/xe_query.h"
#include "i915_perf_metrics_hsw.h"
#include "i915_perf_metrics_bdw.h"
@@ -68,8 +72,6 @@
#include "i915_perf_metrics_mtlgt2.h"
#include "i915_perf_metrics_mtlgt3.h"
-#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]))
-
static int
perf_ioctl(int fd, unsigned long request, void *arg)
{
@@ -609,6 +611,164 @@ intel_sysfs_attr_id_to_name(int sysfs_dirfd, intel_sysfs_attr_id id, int gt)
intel_sysfs_attr_name[0][id];
}
+struct drm_i915_query_topology_info *
+xe_fill_i915_topology_info(int drm_fd)
+{
+ struct drm_i915_query_topology_info i915_topinfo = {};
+ struct drm_i915_query_topology_info *i915_topo;
+ struct drm_xe_query_topology_mask *xe_topo;
+ int total_size, pos = 0;
+ u8 *ptr;
+ struct drm_xe_device_query query = {
+ .extensions = 0,
+ .query = DRM_XE_DEVICE_QUERY_GT_TOPOLOGY,
+ .size = 0,
+ .data = 0,
+ };
+
+ /* Fixed fields, see fill_topology_info() and intel_sseu_set_info() in i915 */
+ i915_topinfo.max_slices = 1; /* always 1 */
+ if (IS_PONTEVECCHIO(xe_dev_id(drm_fd))) {
+ i915_topinfo.max_subslices = 64;
+ i915_topinfo.max_eus_per_subslice = 8;
+ } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 50)) {
+ i915_topinfo.max_subslices = 32;
+ i915_topinfo.max_eus_per_subslice = 16;
+ } else if (intel_graphics_ver(xe_dev_id(drm_fd)) >= IP_VER(12, 0)) {
+ i915_topinfo.max_subslices = 6;
+ i915_topinfo.max_eus_per_subslice = 16;
+ } else {
+ igt_assert(0);
+ }
+ i915_topinfo.subslice_offset = 1; /* always 1 */
+ i915_topinfo.subslice_stride = DIV_ROUND_UP(i915_topinfo.max_subslices, 8);
+ i915_topinfo.eu_offset = i915_topinfo.subslice_offset + i915_topinfo.subslice_stride;
+ i915_topinfo.eu_stride = DIV_ROUND_UP(i915_topinfo.max_eus_per_subslice, 8);
+
+ /* Allocate and start filling the struct to return */
+ total_size = sizeof(i915_topinfo) + i915_topinfo.eu_offset +
+ i915_topinfo.max_subslices * i915_topinfo.eu_stride;
+ i915_topo = malloc(total_size);
+ igt_assert(i915_topo);
+
+ memcpy(i915_topo, &i915_topinfo, sizeof(i915_topinfo));
+ ptr = (u8 *)i915_topo + sizeof(i915_topinfo);
+ *ptr++ = 0x1; /* slice mask */
+
+ /* Get xe topology masks */
+ igt_assert_eq(igt_ioctl(drm_fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
+ igt_assert_neq(query.size, 0);
+
+ xe_topo = malloc(query.size);
+ igt_assert(xe_topo);
+
+ query.data = to_user_pointer(xe_topo);
+ igt_assert_eq(igt_ioctl(drm_fd, DRM_IOCTL_XE_DEVICE_QUERY, &query), 0);
+ igt_debug("Topology size: %d\n", query.size);
+
+ while (query.size >= sizeof(struct drm_xe_query_topology_mask)) {
+ struct drm_xe_query_topology_mask *topo =
+ (struct drm_xe_query_topology_mask*)((unsigned char*)xe_topo + pos);
+ int i, sz = sizeof(struct drm_xe_query_topology_mask) + topo->num_bytes;
+ u64 geom_mask, compute_mask;
+
+ igt_debug(" gt_id: %d type: %d n:%d [%d] ", topo->gt_id, topo->type, topo->num_bytes, sz);
+ for (int j=0; j< topo->num_bytes; j++)
+ igt_debug(" %02x", topo->mask[j]);
+ igt_debug("\n");
+
+ /* i915 only returns topology for gt 0, do the same here */
+ if (topo->gt_id)
+ continue;
+
+ /* Follow the same order as in xe query_gt_topology() */
+ switch (topo->type) {
+ case XE_TOPO_DSS_GEOMETRY:
+ igt_assert_lte(i915_topo->subslice_stride, 8); /* Fit in u64 mask */
+ memcpy(&geom_mask, topo->mask, i915_topo->subslice_stride);
+ break;
+ case XE_TOPO_DSS_COMPUTE:
+ memcpy(&compute_mask, topo->mask, i915_topo->subslice_stride);
+ geom_mask |= compute_mask;
+ memcpy(ptr, &geom_mask, i915_topo->subslice_stride);
+ ptr += i915_topo->subslice_stride;
+ break;
+ case XE_TOPO_EU_PER_DSS:
+ for (i = 0; i < i915_topo->max_subslices; i++) {
+ memcpy(ptr, topo->mask, i915_topo->eu_stride);
+ ptr += i915_topo->eu_stride;
+ }
+ break;
+ default:
+ igt_assert(0);
+ }
+
+ query.size -= sz;
+ pos += sz;
+ }
+
+ free(xe_topo);
+
+ return i915_topo;
+}
+
+static struct intel_perf *
+xe_perf_for_fd(int drm_fd, int gt)
+{
+ uint32_t device_id;
+ uint32_t device_revision = 0;
+ uint32_t timestamp_frequency;
+ uint64_t gt_min_freq;
+ uint64_t gt_max_freq;
+ struct drm_i915_query_topology_info *topology;
+ struct intel_perf *ret;
+ int sysfs_dir_fd = open_master_sysfs_dir(drm_fd);
+ char path_min[64], path_max[64];
+
+ if (sysfs_dir_fd < 0) {
+ igt_warn("open_master_sysfs_dir failed\n");
+ return NULL;
+ }
+
+ if (IS_PONTEVECCHIO(xe_dev_id(drm_fd))) {
+ sprintf(path_min, "device/tile%d/gt%d/freq_min", gt, gt);
+ sprintf(path_max, "device/tile%d/gt%d/freq_max", gt, gt);
+ } else {
+ sprintf(path_min, "device/tile0/gt%d/freq_min", gt);
+ sprintf(path_max, "device/tile0/gt%d/freq_max", gt);
+ }
+
+ if (!read_sysfs(sysfs_dir_fd, path_min, >_min_freq) ||
+ !read_sysfs(sysfs_dir_fd, path_max, >_max_freq)) {
+ igt_warn("Unable to read freqs from sysfs\n");
+ close(sysfs_dir_fd);
+ return NULL;
+ }
+ close(sysfs_dir_fd);
+
+ device_id = intel_get_drm_devid(drm_fd);
+ timestamp_frequency = xe_gts(drm_fd)->gts[0].oa_timestamp_freq;
+
+ topology = xe_fill_i915_topology_info(drm_fd);
+ if (!topology) {
+ igt_warn("xe_fill_i915_topology_info failed\n");
+ return NULL;
+ }
+
+ ret = intel_perf_for_devinfo(device_id,
+ device_revision,
+ timestamp_frequency,
+ gt_min_freq * 1000000,
+ gt_max_freq * 1000000,
+ topology);
+ if (!ret)
+ igt_warn("intel_perf_for_devinfo failed\n");
+
+ free(topology);
+
+ return ret;
+}
+
struct intel_perf *
intel_perf_for_fd(int drm_fd, int gt)
{
@@ -621,6 +781,9 @@ intel_perf_for_fd(int drm_fd, int gt)
struct intel_perf *ret;
int sysfs_dir_fd = open_master_sysfs_dir(drm_fd);
+ if (is_xe_device(drm_fd))
+ return xe_perf_for_fd(drm_fd, gt);
+
if (sysfs_dir_fd < 0)
return NULL;
diff --git a/lib/i915/perf.h b/lib/i915/perf.h
index 8a71ac635e78..f3df578ddc5f 100644
--- a/lib/i915/perf.h
+++ b/lib/i915/perf.h
@@ -318,6 +318,7 @@ intel_perf_devinfo_eu_available(const struct intel_perf_devinfo *devinfo,
return (devinfo->eu_masks[subslice_offset + eu / 8] & (1U << eu % 8)) != 0;
}
+struct drm_i915_query_topology_info *xe_fill_i915_topology_info(int drm_fd);
struct intel_perf *intel_perf_for_fd(int drm_fd, int gt);
struct intel_perf *intel_perf_for_devinfo(uint32_t device_id,
uint32_t revision,
diff --git a/lib/meson.build b/lib/meson.build
index 3e1ecdee2bc8..972f285b6f41 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -344,7 +344,7 @@ endforeach
lib_igt_i915_perf_build = shared_library(
'i915_perf',
i915_perf_files,
- dependencies: lib_igt_chipset,
+ dependencies: [lib_igt_chipset,lib_igt,pciaccess],
include_directories : inc,
install: true,
soversion: '1.5')
diff --git a/lib/xe/xe_query.c b/lib/xe/xe_query.c
index 48fb5afba77b..e9ffe45d7791 100644
--- a/lib/xe/xe_query.c
+++ b/lib/xe/xe_query.c
@@ -487,6 +487,14 @@ uint32_t xe_min_page_size(int fd, uint64_t region)
*/
xe_dev_FN(xe_config, config, struct drm_xe_query_config *);
+/**
+ * xe_gts:
+ * @fd: xe device fd
+ *
+ * Returns query gts of xe device @fd.
+ */
+xe_dev_FN(xe_gts, gts, struct drm_xe_query_gts *);
+
/**
* xe_number_hw_engine:
* @fd: xe device fd
diff --git a/lib/xe/xe_query.h b/lib/xe/xe_query.h
index ff328ab94271..2e3653154e0a 100644
--- a/lib/xe/xe_query.h
+++ b/lib/xe/xe_query.h
@@ -87,6 +87,7 @@ struct drm_xe_query_mem_region *xe_mem_region(int fd, uint64_t region);
const char *xe_region_name(uint64_t region);
uint32_t xe_min_page_size(int fd, uint64_t region);
struct drm_xe_query_config *xe_config(int fd);
+struct drm_xe_query_gts *xe_gts(int fd);
unsigned int xe_number_hw_engines(int fd);
bool xe_has_vram(int fd);
uint64_t xe_vram_size(int fd, int gt);
diff --git a/tests/i915/perf.c b/tests/i915/perf.c
index 3565d61cc393..fccfd2917500 100644
--- a/tests/i915/perf.c
+++ b/tests/i915/perf.c
@@ -45,6 +45,9 @@
#include "igt_perf.h"
#include "igt_sysfs.h"
#include "drm.h"
+#include "xe/xe_ioctl.h"
+#include "xe/xe_query.h"
+
/**
* TEST: perf
* Description: Test the i915 perf metrics streaming interface
@@ -419,6 +422,13 @@ static struct oa_format mtl_oa_formats[I915_OA_FORMAT_MAX] = {
.report_hdr_64bit = true, },
};
+
+/* Track variables which have different values between i915 and xe */
+static struct i915_xe {
+ char sysctl_path_paranoid[80];
+ char sysctl_path_max_sample_rate[80];
+} i9xe;
+
static bool hsw_undefined_a_counters[45] = {
[4] = true,
[6] = true,
@@ -556,6 +566,9 @@ static int i915_perf_revision(int fd)
drm_i915_getparam_t gp;
int value = 1, ret;
+ if (is_xe_device(drm_fd))
+ return xe_config(drm_fd)->info[XE_QUERY_OA_IOCTL_VERSION];
+
gp.param = I915_PARAM_PERF_REVISION;
gp.value = &value;
ret = igt_ioctl(drm_fd, DRM_IOCTL_I915_GETPARAM, &gp);
@@ -629,7 +642,20 @@ sysfs_read(enum i915_attr_id id)
{
unsigned long value;
- igt_assert(igt_sysfs_rps_scanf(sysfs, id, "%lu", &value) == 1);
+ if (is_xe_device(drm_fd)) {
+ switch (id) {
+ case RPS_RP0_FREQ_MHZ:
+ igt_assert(igt_sysfs_scanf(sysfs, "device/tile0/gt0/freq_rp0", "%lu", &value) == 1);
+ break;
+ case RC6_RESIDENCY_MS:
+ igt_assert(igt_sysfs_scanf(sysfs, "device/tile0/gt0/rc6_residency", "%lu", &value) == 1);
+ break;
+ default:
+ igt_assert(0);
+ }
+ } else {
+ igt_assert(igt_sysfs_rps_scanf(sysfs, id, "%lu", &value) == 1);
+ }
return value;
}
@@ -874,15 +900,19 @@ oar_unit_default_format(void)
* Temporary wrapper to distinguish mappings on !llc platforms,
* where it seems cache over GEM_MMAP_OFFSET is not flushed before execution.
*/
-static void *buf_map(int i915, struct intel_buf *buf, bool write)
+static void *buf_map(int fd, struct intel_buf *buf, bool write)
{
void *p;
- if (gem_has_llc(i915))
- p = intel_buf_cpu_map(buf, write);
- else
- p = intel_buf_device_map(buf, write);
-
+ if (is_xe_device(fd)) {
+ buf->ptr = xe_bo_map(fd, buf->handle, buf->surface[0].size);
+ p = buf->ptr;
+ } else {
+ if (gem_has_llc(fd))
+ p = intel_buf_cpu_map(buf, write);
+ else
+ p = intel_buf_device_map(buf, write);
+ }
return p;
}
@@ -1416,7 +1446,7 @@ test_system_wide_paranoid(void)
.properties_ptr = to_user_pointer(properties),
};
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
igt_drop_root();
@@ -1441,7 +1471,7 @@ test_system_wide_paranoid(void)
.num_properties = ARRAY_SIZE(properties) / 2,
.properties_ptr = to_user_pointer(properties),
};
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 0);
+ write_u64_file(i9xe.sysctl_path_paranoid, 0);
igt_drop_root();
@@ -1452,7 +1482,7 @@ test_system_wide_paranoid(void)
igt_waitchildren();
/* leave in paranoid state */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
}
static void
@@ -2287,7 +2317,7 @@ test_invalid_oa_exponent(void)
static void
test_low_oa_exponent_permissions(void)
{
- int max_freq = read_u64_file("/proc/sys/dev/i915/oa_max_sample_rate");
+ int max_freq = read_u64_file(i9xe.sysctl_path_max_sample_rate);
int bad_exponent = max_oa_exponent_for_freq_gt(max_freq);
int ok_exponent = bad_exponent + 1;
uint64_t properties[] = {
@@ -2309,7 +2339,7 @@ test_low_oa_exponent_permissions(void)
igt_assert_eq(max_freq, 100000);
/* Avoid EACCES errors opening a stream without CAP_SYS_ADMIN */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 0);
+ write_u64_file(i9xe.sysctl_path_paranoid, 0);
igt_fork(child, 1) {
igt_drop_root();
@@ -2332,7 +2362,7 @@ test_low_oa_exponent_permissions(void)
oa_period = timebase_scale(2 << ok_exponent);
oa_freq = NSEC_PER_SEC / oa_period;
- write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", oa_freq - 100);
+ write_u64_file(i9xe.sysctl_path_max_sample_rate, oa_freq - 100);
igt_fork(child, 1) {
igt_drop_root();
@@ -2343,8 +2373,8 @@ test_low_oa_exponent_permissions(void)
igt_waitchildren();
/* restore the defaults */
- write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_max_sample_rate, 100000);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
}
static void
@@ -2369,7 +2399,7 @@ test_per_context_mode_unprivileged(void)
};
/* should be default, but just to be sure... */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
igt_fork(child, 1) {
uint32_t ctx_id = 0xffffffff; /* invalid id */
@@ -3562,19 +3592,25 @@ gen12_test_mi_rpc(const struct intel_execution_engine2 *e)
struct intel_buf *buf;
#define INVALID_CTX_ID 0xffffffff
uint32_t ctx_id = INVALID_CTX_ID;
+ uint32_t vm = 0;
uint32_t *report32;
size_t format_size_32;
struct oa_format format = get_oa_format(fmt);
/* Ensure perf_stream_paranoid is set to 1 by default */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
bops = buf_ops_create(drm_fd);
- ctx_id = gem_context_create(drm_fd);
+ if (is_xe_device(drm_fd)) {
+ vm = xe_vm_create(drm_fd, DRM_XE_VM_CREATE_ASYNC_BIND_OPS, 0);
+ ctx_id = xe_engine_create(drm_fd, vm, xe_hw_engine(drm_fd, 0), 0);
+ } else {
+ ctx_id = gem_context_create(drm_fd);
+ }
igt_assert_neq(ctx_id, INVALID_CTX_ID);
properties[1] = ctx_id;
- ibb = intel_bb_create_with_context(drm_fd, ctx_id, 0, NULL, BATCH_SZ);
+ ibb = intel_bb_create_with_context(drm_fd, ctx_id, vm, NULL, BATCH_SZ);
buf = intel_buf_create(bops, 4096, 1, 8, 64,
I915_TILING_NONE, I915_COMPRESSION_NONE);
@@ -3593,7 +3629,7 @@ gen12_test_mi_rpc(const struct intel_execution_engine2 *e)
intel_bb_flush_render(ibb);
intel_bb_sync(ibb);
- intel_buf_cpu_map(buf, false);
+ buf_map(drm_fd, buf, false);
report32 = buf->ptr;
format_size_32 = format.size >> 2;
dump_report(report32, format_size_32, "mi-rpc");
@@ -3619,7 +3655,12 @@ gen12_test_mi_rpc(const struct intel_execution_engine2 *e)
intel_buf_unmap(buf);
intel_buf_destroy(buf);
intel_bb_destroy(ibb);
- gem_context_destroy(drm_fd, ctx_id);
+ if (is_xe_device(drm_fd)) {
+ xe_engine_destroy(drm_fd, ctx_id);
+ xe_vm_destroy(drm_fd, vm);
+ } else {
+ gem_context_destroy(drm_fd, ctx_id);
+ }
buf_ops_destroy(bops);
__perf_close(stream_fd);
}
@@ -3749,7 +3790,7 @@ hsw_test_single_ctx_counters(void)
};
/* should be default, but just to be sure... */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
igt_fork(child, 1) {
struct buf_ops *bops;
@@ -3988,7 +4029,7 @@ gen8_test_single_ctx_render_target_writes_a_counter(void)
struct igt_helper_process child = {};
/* should be default, but just to be sure... */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
do {
@@ -4694,7 +4735,7 @@ gen12_test_single_ctx_render_target_writes_a_counter(const struct intel_executio
struct igt_helper_process child = {};
/* Ensure perf_stream_paranoid is set to 1 by default */
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
do {
igt_fork_helper(&child) {
@@ -5010,7 +5051,7 @@ test_global_sseu_config(const intel_ctx_t *ctx, const struct intel_execution_eng
igt_require(__builtin_popcount(default_sseu.subslice_mask) > 1);
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 0);
+ write_u64_file(i9xe.sysctl_path_paranoid, 0);
sseu_param = make_valid_reduced_sseu_config(default_sseu,
e->class,
@@ -5027,7 +5068,7 @@ test_global_sseu_config(const intel_ctx_t *ctx, const struct intel_execution_eng
igt_waitchildren();
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
stream_fd = __perf_open(drm_fd, ¶m, false);
__perf_close(stream_fd);
@@ -5391,18 +5432,21 @@ test_whitelisted_registers_userspace_config(void)
}
static unsigned
-read_i915_module_ref(void)
+read_i915_module_ref(bool is_xe)
{
FILE *fp = fopen("/proc/modules", "r");
char *line = NULL;
size_t line_buf_size = 0;
int len = 0;
unsigned ref_count;
+ char mod[8];
+ int modn = is_xe ? 3 : 5;
igt_assert(fp);
+ strcpy(mod, is_xe ? "xe " : "i915 ");
while ((len = getline(&line, &line_buf_size, fp)) > 0) {
- if (strncmp(line, "i915 ", 5) == 0) {
+ if (strncmp(line, mod, modn) == 0) {
unsigned long mem;
int ret = sscanf(line + 5, "%lu %u", &mem, &ref_count);
igt_assert(ret == 2);
@@ -5422,6 +5466,9 @@ static int perf_sysfs_open(int i915)
{
int dirfd, gt;
+ if (is_xe_device(drm_fd))
+ return igt_sysfs_open(drm_fd);
+
/* use the first available sysfs interface */
for_each_sysfs_gt_dirfd(i915, dirfd, gt)
break;
@@ -5454,17 +5501,26 @@ test_i915_ref_count(void)
unsigned baseline, ref_count0, ref_count1;
uint32_t oa_report0[64];
uint32_t oa_report1[64];
+ bool is_xe;
/* This should be the first test before the first fixture so no drm_fd
* should have been opened so far...
*/
igt_assert_eq(drm_fd, -1);
- baseline = read_i915_module_ref();
+ /* Tell read_i915_module_ref if we are on xe or i915 (because drm_fd is -1) */
+ drm_fd = __drm_open_driver(DRIVER_INTEL | DRIVER_XE);
+ is_xe = is_xe_device(drm_fd);
+ drm_close_driver(drm_fd);
+ close(sysfs);
+ drm_fd = -1;
+
+ baseline = read_i915_module_ref(is_xe);
igt_debug("baseline ref count (drm fd closed) = %u\n", baseline);
- drm_fd = __drm_open_driver(DRIVER_INTEL);
- igt_require_i915(drm_fd);
+ drm_fd = __drm_open_driver(DRIVER_INTEL | DRIVER_XE);
+ if (is_xe_device(drm_fd))
+ xe_device_get(drm_fd);
devid = intel_get_drm_devid(drm_fd);
sysfs = perf_sysfs_open(drm_fd);
@@ -5476,12 +5532,12 @@ test_i915_ref_count(void)
properties[5] = default_test_set->perf_oa_format;
properties[7] = oa_exp_1_millisec;
- ref_count0 = read_i915_module_ref();
+ ref_count0 = read_i915_module_ref(is_xe);
igt_debug("initial ref count with drm_fd open = %u\n", ref_count0);
igt_assert(ref_count0 > baseline);
stream_fd = __perf_open(drm_fd, ¶m, false);
- ref_count1 = read_i915_module_ref();
+ ref_count1 = read_i915_module_ref(is_xe);
igt_debug("ref count after opening i915 perf stream = %u\n", ref_count1);
igt_assert(ref_count1 > ref_count0);
@@ -5489,7 +5545,7 @@ test_i915_ref_count(void)
close(sysfs);
drm_fd = -1;
sysfs = -1;
- ref_count0 = read_i915_module_ref();
+ ref_count0 = read_i915_module_ref(is_xe);
igt_debug("ref count after closing drm fd = %u\n", ref_count0);
igt_assert(ref_count0 > baseline);
@@ -5501,7 +5557,7 @@ test_i915_ref_count(void)
false); /* not just timer reports */
__perf_close(stream_fd);
- ref_count0 = read_i915_module_ref();
+ ref_count0 = read_i915_module_ref(is_xe);
igt_debug("ref count after closing i915 perf stream fd = %u\n", ref_count0);
igt_assert_eq(ref_count0, baseline);
}
@@ -5509,8 +5565,8 @@ test_i915_ref_count(void)
static void
test_sysctl_defaults(void)
{
- int paranoid = read_u64_file("/proc/sys/dev/i915/perf_stream_paranoid");
- int max_freq = read_u64_file("/proc/sys/dev/i915/oa_max_sample_rate");
+ int paranoid = read_u64_file(i9xe.sysctl_path_paranoid);
+ int max_freq = read_u64_file(i9xe.sysctl_path_max_sample_rate);
igt_assert_eq(paranoid, 1);
igt_assert_eq(max_freq, 100000);
@@ -5522,13 +5578,18 @@ __ci_to_e2(const intel_ctx_t *ctx, struct i915_engine_class_instance *ci)
static struct intel_execution_engine2 e2;
struct intel_execution_engine2 *e;
+ if (is_xe_device(drm_fd)) {
+ strncpy(e2.name, "rcs", sizeof(e2.name));
+ goto exit;
+ }
+
for_each_ctx_engine(drm_fd, ctx, e) {
if (e->class == ci->engine_class && e->instance == ci->engine_instance) {
e2 = *e;
break;
}
}
-
+exit:
return &e2;
}
@@ -5684,6 +5745,9 @@ static struct perf_engine_group *get_engine_groups(int i915, uint32_t *num_group
struct perf_engine_group *groups = NULL;
uint32_t id = UINT32_MAX, num_grps = 0, i = 0, j;
+ if (is_xe_device(drm_fd))
+ return default_engine_group(num_groups);
+
qinfo = query_engine_info(i915);
if (!qinfo)
return default_engine_group(num_groups);
@@ -5766,6 +5830,9 @@ static bool has_class_instance(int i915, uint16_t class, uint16_t instance)
{
int fd;
+ if (is_xe_device(drm_fd))
+ return class == I915_ENGINE_CLASS_RENDER ? true : false;
+
fd = perf_i915_open(i915, I915_PMU_ENGINE_BUSY(class, instance));
if (fd >= 0) {
close(fd);
@@ -5899,31 +5966,12 @@ test_group_concurrent_oa_buffer_read(void)
igt_main
{
- const intel_ctx_t *ctx;
+ const intel_ctx_t *ctx = NULL;
const struct intel_execution_engine2 *e;
- igt_fixture {
- struct stat sb;
-
- /*
- * Prior tests may have unloaded i915 or failed while
- * loading/unloading i915. Load i915 here before we stat the
- * files.
- */
- drm_load_module(DRIVER_INTEL);
-
- igt_require(stat("/proc/sys/dev/i915/perf_stream_paranoid", &sb)
- == 0);
- igt_require(stat("/proc/sys/dev/i915/oa_max_sample_rate", &sb)
- == 0);
- }
-
igt_subtest("i915-ref-count")
test_i915_ref_count();
- igt_subtest("sysctl-defaults")
- test_sysctl_defaults();
-
igt_fixture {
/* We expect that the ref count test before these fixtures
* should have closed drm_fd...
@@ -5931,27 +5979,44 @@ igt_main
igt_assert_eq(drm_fd, -1);
/* Avoid the normal exithandler, our perf-fd interferes */
- drm_fd = __drm_open_driver(DRIVER_INTEL);
- igt_require_gem(drm_fd);
+ drm_fd = __drm_open_driver(DRIVER_INTEL | DRIVER_XE);
+ igt_require(is_intel_device(drm_fd));
+ if (is_xe_device(drm_fd)) {
+ xe_device_get(drm_fd);
+ sprintf(i9xe.sysctl_path_paranoid, "/proc/sys/dev/xe/perf_stream_paranoid");
+ sprintf(i9xe.sysctl_path_max_sample_rate, "/proc/sys/dev/xe/oa_max_sample_rate");
+ } else {
+ igt_require_gem(drm_fd);
+ sprintf(i9xe.sysctl_path_paranoid, "/proc/sys/dev/i915/perf_stream_paranoid");
+ sprintf(i9xe.sysctl_path_max_sample_rate, "/proc/sys/dev/i915/oa_max_sample_rate");
+ }
devid = intel_get_drm_devid(drm_fd);
sysfs = perf_sysfs_open(drm_fd);
igt_require(init_sys_info());
- ctx = intel_ctx_create_all_physical(drm_fd);
- set_default_engine(ctx);
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
- write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
+ if (!is_xe_device(drm_fd)) {
+ ctx = intel_ctx_create_all_physical(drm_fd);
+ set_default_engine(ctx);
+ }
+
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
+ write_u64_file(i9xe.sysctl_path_max_sample_rate, 100000);
gt_max_freq_mhz = sysfs_read(RPS_RP0_FREQ_MHZ);
+
perf_oa_groups = get_engine_groups(drm_fd, &num_perf_oa_groups);
igt_assert(perf_oa_groups && num_perf_oa_groups);
- if (has_class_instance(drm_fd, I915_ENGINE_CLASS_RENDER, 0))
+ if (has_class_instance(drm_fd, I915_ENGINE_CLASS_RENDER, 0) &&
+ !is_xe_device(drm_fd))
render_copy = igt_get_render_copyfunc(devid);
}
+ igt_subtest("sysctl-defaults")
+ test_sysctl_defaults();
+
igt_subtest("non-system-wide-paranoid")
test_system_wide_paranoid();
@@ -6099,8 +6164,14 @@ igt_main
igt_describe("Test MI REPORT PERF COUNT for Gen 12");
igt_subtest_with_dynamic("gen12-mi-rpc") {
igt_require(has_class_instance(drm_fd, I915_ENGINE_CLASS_RENDER, 0));
- __for_each_render_engine(drm_fd, e)
- gen12_test_mi_rpc(e);
+ if (is_xe_device(drm_fd)) {
+ const struct intel_execution_engine2 e2 = {};
+ igt_dynamic_f("%s", "rcs")
+ gen12_test_mi_rpc(&e2);
+ } else {
+ __for_each_render_engine(drm_fd, e)
+ gen12_test_mi_rpc(e);
+ }
}
igt_describe("Test OA TLB invalidate");
@@ -6112,8 +6183,14 @@ igt_main
igt_subtest_with_dynamic("gen12-unprivileged-single-ctx-counters") {
igt_require(has_class_instance(drm_fd, I915_ENGINE_CLASS_RENDER, 0));
igt_require_f(render_copy, "no render-copy function\n");
- __for_each_render_engine(drm_fd, e)
- gen12_test_single_ctx_render_target_writes_a_counter(e);
+ if (is_xe_device(drm_fd)) {
+ const struct intel_execution_engine2 e2 = {};
+ igt_dynamic_f("%s", "rcs")
+ gen12_test_single_ctx_render_target_writes_a_counter(&e2);
+ } else {
+ __for_each_render_engine(drm_fd, e)
+ gen12_test_single_ctx_render_target_writes_a_counter(e);
+ }
}
}
@@ -6130,12 +6207,14 @@ igt_main
*/
igt_describe("Verify exclusivity of perf streams with sample oa option");
igt_subtest("gen12-group-exclusive-stream-sample-oa") {
+ igt_require(!is_xe_device(drm_fd));
igt_require(intel_gen(devid) >= 12);
test_group_exclusive_stream(ctx, true);
}
igt_describe("Verify exclusivity of perf streams with ctx handle");
igt_subtest("gen12-group-exclusive-stream-ctx-handle") {
+ igt_require(!is_xe_device(drm_fd));
igt_require(intel_gen(devid) >= 12);
test_group_exclusive_stream(ctx, false);
}
@@ -6160,14 +6239,18 @@ igt_main
}
igt_describe("Verify invalid SSEU opening parameters");
- igt_subtest_with_dynamic("global-sseu-config-invalid")
+ igt_subtest_with_dynamic("global-sseu-config-invalid") {
+ igt_require(!is_xe_device(drm_fd));
__for_random_engine_in_each_group(perf_oa_groups, ctx, e)
test_global_sseu_config_invalid(ctx, e);
+ }
igt_describe("Verify specifying SSEU opening parameters");
- igt_subtest_with_dynamic("global-sseu-config")
+ igt_subtest_with_dynamic("global-sseu-config") {
+ igt_require(!is_xe_device(drm_fd));
__for_random_engine_in_each_group(perf_oa_groups, ctx, e)
test_global_sseu_config(ctx, e);
+ }
}
igt_subtest("invalid-create-userspace-config")
@@ -6184,8 +6267,8 @@ igt_main
igt_fixture {
/* leave sysctl options in their default state... */
- write_u64_file("/proc/sys/dev/i915/oa_max_sample_rate", 100000);
- write_u64_file("/proc/sys/dev/i915/perf_stream_paranoid", 1);
+ write_u64_file(i9xe.sysctl_path_max_sample_rate, 100000);
+ write_u64_file(i9xe.sysctl_path_paranoid, 1);
if (intel_perf)
intel_perf_free(intel_perf);
--
2.38.0
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