[PATCH 3/9] drm/i915/gt: Ensure memory quiesced before invalidation
Andi Shyti
andi.shyti at linux.intel.com
Sun Jul 23 09:48:46 UTC 2023
From: Jonathan Cavitt <jonathan.cavitt at intel.com>
All memory traffic must be quiesced before requesting
an aux invalidation on platforms that use Aux CCS.
Fixes: 972282c4cf24 ("drm/i915/gen12: Add aux table invalidate for all engines")
Signed-off-by: Jonathan Cavitt <jonathan.cavitt at intel.com>
Signed-off-by: Andi Shyti <andi.shyti at linux.intel.com>
Cc: <stable at vger.kernel.org> # v5.8+
Reviewed-by: Nirmoy Das <nirmoy.das at intel.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda at intel.com>
---
drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 460c9225a50fc..6210b38a2d382 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -214,7 +214,11 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 mode)
{
struct intel_engine_cs *engine = rq->engine;
- if (mode & EMIT_FLUSH) {
+ /*
+ * On Aux CCS platforms the invalidation of the Aux
+ * table requires quiescing memory traffic beforehand
+ */
+ if (mode & EMIT_FLUSH || gen12_needs_ccs_aux_inv(engine)) {
u32 flags = 0;
int err;
u32 *cs;
--
2.40.1
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