[PATCH 10/10] change flush position

[Andi Shyti]

---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 6d3738a2cfbdc..59d964e23e0ea 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -373,7 +373,7 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 	 */
 	if (gen12_needs_ccs_aux_inv(rq->engine)) {
 		cmd += 8; /* for the AUX invalidation */
-		cmd += 2; /* for the engine quiescing */
+		//cmd += 2; /* for the engine quiescing
 
 		cmd_flush = MI_FLUSH_DW;
 
@@ -385,11 +385,6 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 	if (IS_ERR(cs))
 		return PTR_ERR(cs);
 
-	if (cmd_flush) {
-		*cs++ = cmd_flush;
-		*cs++ = 0;
-	}
-
 	if (mode & EMIT_INVALIDATE)
 		*cs++ = preparser_disable(true);
 
@@ -414,6 +409,13 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 	*cs++ = 0; /* upper addr */
 	*cs++ = 0; /* value */
 
+	/*
+	if (cmd_flush) {
+		*cs++ = cmd_flush;
+		*cs++ = 0;
+	}
+	*/
+
 	cs = gen12_emit_aux_table_inv(rq->engine, cs);
 
 	if (mode & EMIT_INVALIDATE)
-- 
2.40.1