[PATCH 25/27] drm/i915/dp: Iterate over output bpp with fractional step size

[Ankit Nautiyal]

This patch adds support to iterate over compressed output bpp as per the
fractional step, supported by DP sink.

v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 32 ++++++++++++++++---------
 1 file changed, 21 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 027f5430835f..b7c8ac47d8c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1691,10 +1691,12 @@ static bool intel_dp_dsc_supports_format(struct intel_dp *intel_dp,
 	return drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd, sink_dsc_format);
 }
 
-static bool is_dsc_bw_sufficient(int link_rate, int lane_count, int compressed_bpp,
+static bool is_dsc_bw_sufficient(int link_rate, int lane_count, int compressed_bppx16,
 				 const struct drm_display_mode *adjusted_mode)
 {
-	int mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, compressed_bpp);
+	int mode_rate = DIV_ROUND_UP(intel_dp_link_required(adjusted_mode->crtc_clock,
+							    compressed_bppx16), 16);
+
 	int link_avail = intel_dp_max_data_rate(link_rate, lane_count);
 
 	return mode_rate <= link_avail;
@@ -1704,7 +1706,7 @@ static int dsc_compute_link_config(struct intel_dp *intel_dp,
 				   struct intel_crtc_state *pipe_config,
 				   struct link_config_limits *limits,
 				   int pipe_bpp,
-				   u16 compressed_bpp,
+				   u16 compressed_bppx16,
 				   int timeslots)
 {
 	const struct drm_display_mode *adjusted_mode =
@@ -1739,11 +1741,11 @@ static int dsc_compute_link_config(struct intel_dp *intel_dp,
 			if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420)
 				dsc_max_bpp = min_t(u16, dsc_max_bpp, 31);
 
-			if (compressed_bpp > dsc_max_bpp)
+			if (compressed_bppx16 > dsc_max_bpp << 16)
 				continue;
 
 			if (!is_dsc_bw_sufficient(link_rate, lane_count,
-						  compressed_bpp, adjusted_mode))
+						  compressed_bppx16, adjusted_mode))
 				continue;
 
 			pipe_config->lane_count = lane_count;
@@ -1834,9 +1836,12 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
 				      int pipe_bpp,
 				      int timeslots)
 {
-	u16 compressed_bpp;
+	u8 bppx16_incr = drm_dp_dsc_sink_bpp_incr(intel_dp->dsc_dpcd);
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	int dsc_src_min_bpp, dsc_sink_min_bpp, dsc_min_bpp;
 	int dsc_src_max_bpp, dsc_sink_max_bpp, dsc_max_bpp;
+	u16 compressed_bppx16;
+	u8 bppx16_step;
 	int ret;
 
 	dsc_src_min_bpp = dsc_src_min_compressed_bpp();
@@ -1850,17 +1855,22 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
 	/* Compressed BPP should be less than the Input DSC bpp */
 	dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
 
-	for (compressed_bpp = dsc_max_bpp;
-	     compressed_bpp >= dsc_min_bpp;
-	     compressed_bpp--) {
+	if (DISPLAY_VER(i915) < 14 || bppx16_incr <= 1)
+		bppx16_step = 16;
+	else
+		bppx16_step = 16 / bppx16_incr;
+
+	for (compressed_bppx16 = dsc_max_bpp << 4;
+	     compressed_bppx16 >= dsc_min_bpp << 4;
+	     compressed_bppx16 -= bppx16_step) {
 		ret = dsc_compute_link_config(intel_dp,
 					      pipe_config,
 					      limits,
 					      pipe_bpp,
-					      compressed_bpp,
+					      compressed_bppx16,
 					      timeslots);
 		if (ret == 0) {
-			pipe_config->dsc.compressed_bpp = compressed_bpp << 4;
+			pipe_config->dsc.compressed_bpp = compressed_bppx16;
 			return 0;
 		}
 	}
-- 
2.40.1