[i-g-t] XE: Engg patch to fix XE IGT
Bhanuprakash Modem
bhanuprakash.modem at intel.com
Sun Jun 18 15:51:45 UTC 2023
Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem at intel.com>
---
lib/i915/i915_blt.c | 12 +-
lib/i915/i915_blt.h | 3 +
lib/igt_draw.c | 5 +-
lib/igt_fb.c | 273 +++++++++++++++++++++++++++----
lib/intel_bufops.c | 13 +-
tests/i915/kms_big_fb.c | 23 +--
tests/i915/kms_ccs.c | 42 +++--
tests/i915/kms_draw_crc.c | 4 -
tests/i915/kms_fb_coherency.c | 43 ++---
tests/i915/kms_fbcon_fbt.c | 2 +-
tests/i915/kms_flip_scaled_crc.c | 6 -
tests/i915/kms_flip_tiling.c | 6 -
tests/kms_addfb_basic.c | 17 +-
tests/kms_async_flips.c | 12 +-
tests/kms_cursor_edge_walk.c | 2 +-
tests/kms_cursor_legacy.c | 7 +-
tests/kms_flip.c | 4 +-
tests/kms_getfb.c | 10 +-
tests/kms_plane.c | 4 -
tests/kms_plane_lowres.c | 3 -
tests/kms_plane_scaling.c | 4 -
tests/kms_rotation_crc.c | 8 +-
22 files changed, 343 insertions(+), 160 deletions(-)
diff --git a/lib/i915/i915_blt.c b/lib/i915/i915_blt.c
index ef67fe26f..f18b6326d 100644
--- a/lib/i915/i915_blt.c
+++ b/lib/i915/i915_blt.c
@@ -708,8 +708,10 @@ uint64_t emit_blt_block_copy(int i915,
igt_assert_f(blt, "block-copy requires data to do blit\n");
alignment = gem_detect_safe_alignment(i915);
- src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
- dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+ src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+ + blt->src.plane_offset;
+ dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+ + blt->dst.plane_offset;
bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
fill_data(&data, blt, src_offset, dst_offset, ext);
@@ -1179,8 +1181,10 @@ uint64_t emit_blt_fast_copy(int i915,
data.dw03.dst_x2 = blt->dst.x2;
data.dw03.dst_y2 = blt->dst.y2;
- src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment);
- dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment);
+ src_offset = get_offset(ahnd, blt->src.handle, blt->src.size, alignment)
+ + blt->src.plane_offset;
+ dst_offset = get_offset(ahnd, blt->dst.handle, blt->dst.size, alignment)
+ + blt->dst.plane_offset;
bb_offset = get_offset(ahnd, blt->bb.handle, blt->bb.size, alignment);
data.dw04.dst_address_lo = dst_offset;
diff --git a/lib/i915/i915_blt.h b/lib/i915/i915_blt.h
index a5f0edd15..05a80ce63 100644
--- a/lib/i915/i915_blt.h
+++ b/lib/i915/i915_blt.h
@@ -85,6 +85,9 @@ struct blt_copy_object {
/* mapping or null */
uint32_t *ptr;
+
+ /* enable to use multiplane framebuffers */
+ uint32_t plane_offset;
};
struct blt_copy_batch {
diff --git a/lib/igt_draw.c b/lib/igt_draw.c
index 6f3629949..a578560ac 100644
--- a/lib/igt_draw.c
+++ b/lib/igt_draw.c
@@ -677,14 +677,11 @@ static void draw_rect_blt(int fd, struct cmd_data *cmd_data,
int gen = intel_gen(devid);
int pitch;
- if (tiling)
- igt_require_i915(fd);
-
dst = create_buf(fd, cmd_data->bops, buf, tiling);
ibb = intel_bb_create(fd, PAGE_SIZE);
intel_bb_add_intel_buf(ibb, dst, true);
- if (is_i915_device(fd) && HAS_4TILE(intel_get_drm_devid(fd))) {
+ if (HAS_4TILE(intel_get_drm_devid(fd))) {
int buf_height = buf->size / buf->stride;
switch (buf->bpp) {
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 9be312a28..f86af0c2a 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -35,6 +35,8 @@
#include "drmtest.h"
#include "i915/gem_create.h"
#include "i915/gem_mman.h"
+#include "i915/i915_blt.h"
+#include "intel_mocs.h"
#include "igt_aux.h"
#include "igt_color_encoding.h"
#include "igt_fb.h"
@@ -445,7 +447,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
*height_ret = 1;
break;
case I915_FORMAT_MOD_X_TILED:
- igt_require_i915(fd);
+ igt_require_intel(fd);
if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
*width_ret = 128;
*height_ret = 16;
@@ -466,7 +468,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS:
case I915_FORMAT_MOD_4_TILED_DG2_MC_CCS:
case I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC:
- igt_require_i915(fd);
+ igt_require_intel(fd);
if (intel_display_ver(intel_get_drm_devid(fd)) == 2) {
*width_ret = 128;
*height_ret = 16;
@@ -480,7 +482,7 @@ void igt_get_fb_tile_size(int fd, uint64_t modifier, int fb_bpp,
break;
case I915_FORMAT_MOD_Yf_TILED:
case I915_FORMAT_MOD_Yf_TILED_CCS:
- igt_require_i915(fd);
+ igt_require_intel(fd);
switch (fb_bpp) {
case 8:
*width_ret = 64;
@@ -2453,29 +2455,40 @@ struct fb_blit_upload {
struct intel_bb *ibb;
};
-static bool fast_blit_ok(const struct igt_fb *fb)
+static enum blt_tiling_type fb_tile_to_blt_tile(uint64_t tile)
{
- int dev_id = intel_get_drm_devid(fb->fd);
- int ver = intel_display_ver(dev_id);
-
- if (ver < 9)
- return false;
-
- if (ver < 12)
- return true;
-
- if (ver >= 13 && !IS_ALDERLAKE_P(dev_id))
- return true;
+ switch (igt_fb_mod_to_tiling(tile)) {
+ case I915_TILING_NONE:
+ return T_LINEAR;
+ case I915_TILING_X:
+ return T_XMAJOR;
+ case I915_TILING_Y:
+ return T_YMAJOR;
+ case I915_TILING_4:
+ return T_TILE4;
+ case I915_TILING_Yf:
+ return T_YFMAJOR;
+ default:
+ igt_assert_f(0, "Unknown tiling!\n");
+ }
+}
- return fb->modifier != I915_FORMAT_MOD_X_TILED;
+static bool fast_blit_ok(const struct igt_fb *fb)
+{
+ return blt_has_fast_copy(fb->fd) &&
+ !is_ccs_modifier(fb->modifier) &&
+ blt_fast_copy_supports_tiling(fb->fd,
+ fb_tile_to_blt_tile(fb->modifier));
}
static bool blitter_ok(const struct igt_fb *fb)
{
- if (!is_i915_device(fb->fd))
+ if (!is_intel_device(fb->fd))
return false;
- if (is_ccs_modifier(fb->modifier))
+ if ((is_ccs_modifier(fb->modifier) &&
+ !HAS_FLATCCS(intel_get_drm_devid(fb->fd)))
+ || is_gen12_mc_ccs_modifier(fb->modifier))
return false;
for (int i = 0; i < fb->num_planes; i++) {
@@ -2506,13 +2519,11 @@ static bool blitter_ok(const struct igt_fb *fb)
static bool use_enginecopy(const struct igt_fb *fb)
{
- if (!is_xe_device(fb->fd) && blitter_ok(fb))
+ if (blitter_ok(fb))
return false;
- return fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
- is_ccs_modifier(fb->modifier) ||
- (is_xe_device(fb->fd) && fb->modifier == DRM_FORMAT_MOD_LINEAR) ||
- (is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
+ return (!HAS_FLATCCS(intel_get_drm_devid(fb->fd)) && is_ccs_modifier(fb->modifier)) ||
+ is_gen12_mc_ccs_modifier(fb->modifier);
}
static bool use_blitter(const struct igt_fb *fb)
@@ -2521,6 +2532,7 @@ static bool use_blitter(const struct igt_fb *fb)
return false;
return fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+ fb->modifier == I915_FORMAT_MOD_4_TILED ||
fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
(is_i915_device(fb->fd) && !gem_has_mappable_ggtt(fb->fd));
}
@@ -2712,34 +2724,181 @@ static void copy_with_engine(struct fb_blit_upload *blit,
fini_buf(src);
}
+static struct blt_copy_object *blt_fb_init(const struct igt_fb *fb,
+ uint32_t plane, uint32_t memregion)
+{
+ uint32_t name, handle;
+ struct blt_copy_object *blt;
+ enum blt_tiling_type blt_tile;
+ uint64_t stride;
+
+ blt = malloc(sizeof(*blt));
+ igt_assert(blt);
+
+ name = gem_flink(fb->fd, fb->gem_handle);
+ handle = gem_open(fb->fd, name);
+
+ blt_tile = fb_tile_to_blt_tile(fb->modifier);
+ stride = blt_tile == T_LINEAR ? fb->strides[plane] : fb->strides[plane] / 4;
+
+ blt_set_object(blt, handle, fb->size, memregion,
+ intel_get_uc_mocs(fb->fd),
+ blt_tile,
+ is_ccs_modifier(fb->modifier) ? COMPRESSION_ENABLED : COMPRESSION_DISABLED,
+ is_gen12_mc_ccs_modifier(fb->modifier) ? COMPRESSION_TYPE_MEDIA : COMPRESSION_TYPE_3D);
+
+ blt_set_geom(blt, stride, 0, 0, fb->width, fb->plane_height[plane], 0, 0);
+
+ blt->plane_offset = fb->offsets[plane];
+
+ blt->ptr = gem_mmap__device_coherent(fb->fd, handle, 0, fb->size,
+ PROT_READ | PROT_WRITE);
+ return blt;
+}
+
+static enum blt_color_depth blt_get_bpp(const struct igt_fb *fb)
+{
+ switch (fb->plane_bpp[0]) {
+ case 8:
+ return CD_8bit;
+ case 16:
+ return CD_16bit;
+ case 32:
+ return CD_32bit;
+ case 64:
+ return CD_64bit;
+ case 96:
+ return CD_96bit;
+ case 128:
+ return CD_128bit;
+ default:
+ igt_assert(0);
+ }
+}
+
+#define BLT_TARGET_RC(x) (x.compression == COMPRESSION_ENABLED && \
+ x.compression_type == COMPRESSION_TYPE_3D)
+
+#define BLT_TARGET_MC(x) (x.compression == COMPRESSION_ENABLED && \
+ x.compression_type == COMPRESSION_TYPE_MEDIA)
+
+static uint32_t blt_compression_format(struct blt_copy_data *blt,
+ const struct igt_fb *fb)
+{
+ if (blt->src.compression == COMPRESSION_DISABLED &&
+ blt->dst.compression == COMPRESSION_DISABLED)
+ return 0;
+
+ if (BLT_TARGET_RC(blt->src) || BLT_TARGET_RC(blt->dst)) {
+ switch (blt->color_depth) {
+ case CD_32bit:
+ return 8;
+ default:
+ igt_assert_f(0, "COMPRESSION_TYPE_3D unknown color depth\n");
+ }
+ } else if (BLT_TARGET_MC(blt->src)) {
+ switch (fb->drm_format) {
+ case DRM_FORMAT_XRGB8888:
+ return 8;
+ case DRM_FORMAT_XYUV8888:
+ return 9;
+ case DRM_FORMAT_NV12:
+ return 9;
+ case DRM_FORMAT_P010:
+ case DRM_FORMAT_P012:
+ case DRM_FORMAT_P016:
+ return 8;
+ default:
+ igt_assert_f(0, "COMPRESSION_TYPE_MEDIA unknown format\n");
+ }
+ } else if (BLT_TARGET_MC(blt->dst)) {
+ igt_assert_f(0, "Destination compression not supported on mc ccs\n");
+ } else {
+ igt_assert_f(0, "unknown compression\n");
+ }
+}
+
+static void copy_with_blit(struct fb_blit_upload *blit,
+ const struct igt_fb *dst_fb,
+ const struct igt_fb *src_fb)
+{
+ struct intel_buf *src, *dst;
+ uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+ uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+
+ igt_assert_eq(dst_fb->fd, src_fb->fd);
+ igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
+
+ src = create_buf(blit, src_fb, "cairo blit src");
+ dst = create_buf(blit, dst_fb, "cairo blit dst");
+
+ intel_buf_print(src);
+ intel_buf_print(dst);
+
+ for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
+ igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
+ igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
+ igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
+
+ intel_bb_blt_copy(blit->ibb,
+ src, 0, 0, src_fb->strides[i],
+ dst, 0, 0, dst_fb->strides[i],
+ dst_fb->plane_width[i],
+ dst_fb->plane_height[i],
+ dst_fb->plane_bpp[0]);
+ }
+
+// intel_bb_emit_bbe(blit->ibb);
+// intel_bb_flush_blit(blit->ibb);
+ igt_assert(intel_bb_sync(blit->ibb) == 0);
+ intel_bb_reset(blit->ibb, false);
+
+ fini_buf(src);
+ fini_buf(dst);
+}
+
static void blitcopy(const struct igt_fb *dst_fb,
const struct igt_fb *src_fb)
{
uint32_t src_tiling, dst_tiling;
uint32_t ctx = 0;
uint64_t ahnd = 0;
+ const intel_ctx_t *ictx;
+ struct intel_execution_engine2 *e;
+ uint32_t bb;
+ uint64_t bb_size = 4096;
+ struct blt_copy_data blt = {};
+ struct blt_copy_object *src, *dst;
+ struct blt_block_copy_data_ext ext = {}, *pext = NULL;
+ uint32_t mem_region = HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))
+ ? REGION_LMEM(0) : REGION_SMEM;
+ /* To ignore CC plane */
+ uint32_t src_cc = src_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
+ uint32_t dst_cc = dst_fb->modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC ? 1 : 0;
igt_assert_eq(dst_fb->fd, src_fb->fd);
- igt_assert_eq(dst_fb->num_planes, src_fb->num_planes);
+ igt_assert_eq(dst_fb->num_planes - dst_cc, src_fb->num_planes - src_cc);
src_tiling = igt_fb_mod_to_tiling(src_fb->modifier);
dst_tiling = igt_fb_mod_to_tiling(dst_fb->modifier);
if (is_i915_device(dst_fb->fd) && !gem_has_relocations(dst_fb->fd)) {
igt_require(gem_has_contexts(dst_fb->fd));
+ ictx = intel_ctx_create_all_physical(src_fb->fd);
ctx = gem_context_create(dst_fb->fd);
ahnd = get_reloc_ahnd(dst_fb->fd, ctx);
+
+ igt_assert(__gem_create_in_memory_regions(src_fb->fd,
+ &bb,
+ &bb_size,
+ mem_region) == 0);
}
- for (int i = 0; i < dst_fb->num_planes; i++) {
+ for (int i = 0; i < dst_fb->num_planes - dst_cc; i++) {
igt_assert_eq(dst_fb->plane_bpp[i], src_fb->plane_bpp[i]);
igt_assert_eq(dst_fb->plane_width[i], src_fb->plane_width[i]);
igt_assert_eq(dst_fb->plane_height[i], src_fb->plane_height[i]);
- /*
- * On GEN12+ X-tiled format support is removed from the fast
- * blit command, so use the XY_SRC blit command for it
- * instead.
- */
+
if (fast_blit_ok(src_fb) && fast_blit_ok(dst_fb)) {
igt_blitter_fast_copy__raw(dst_fb->fd,
ahnd, ctx, NULL,
@@ -2758,6 +2917,42 @@ static void blitcopy(const struct igt_fb *dst_fb,
dst_tiling,
0, 0 /* dst_x, dst_y */,
dst_fb->size);
+ } else if (ahnd && blt_has_block_copy(src_fb->fd)) {
+ for_each_ctx_engine(src_fb->fd, ictx, e) {
+ if (gem_engine_can_block_copy(src_fb->fd, e))
+ break;
+ }
+ igt_assert_f(e, "No block copy capable engine found!\n");
+
+ src = blt_fb_init(src_fb, i, mem_region);
+ dst = blt_fb_init(dst_fb, i, mem_region);
+
+ memset(&blt, 0, sizeof(blt));
+ blt.color_depth = blt_get_bpp(src_fb);
+ blt_set_copy_object(&blt.src, src);
+ blt_set_copy_object(&blt.dst, dst);
+
+ if (HAS_FLATCCS(intel_get_drm_devid(src_fb->fd))) {
+ blt_set_object_ext(&ext.src,
+ blt_compression_format(&blt, src_fb),
+ src_fb->width, src_fb->height,
+ SURFACE_TYPE_2D);
+
+ blt_set_object_ext(&ext.dst,
+ blt_compression_format(&blt, dst_fb),
+ dst_fb->width, dst_fb->height,
+ SURFACE_TYPE_2D);
+
+ pext = &ext;
+ }
+
+ blt_set_batch(&blt.bb, bb, bb_size, mem_region);
+
+ blt_block_copy(src_fb->fd, ictx, e, ahnd, &blt, pext);
+ gem_sync(src_fb->fd, blt.dst.handle);
+
+ blt_destroy_object(src_fb->fd, src);
+ blt_destroy_object(dst_fb->fd, dst);
} else {
igt_blitter_src_copy(dst_fb->fd,
ahnd, ctx, NULL,
@@ -2782,6 +2977,7 @@ static void blitcopy(const struct igt_fb *dst_fb,
if (ctx)
gem_context_destroy(dst_fb->fd, ctx);
put_ahnd(ahnd);
+ intel_ctx_destroy(src_fb->fd, ictx);
}
static void free_linear_mapping(struct fb_blit_upload *blit)
@@ -2807,9 +3003,14 @@ static void free_linear_mapping(struct fb_blit_upload *blit)
igt_nouveau_delete_bo(&linear->fb);
} else if (is_xe_device(fd)) {
gem_munmap(linear->map, linear->fb.size);
- copy_with_engine(blit, fb, &linear->fb);
- syncobj_wait(fd, &blit->ibb->engine_syncobj, 1, INT64_MAX, 0, NULL);
+ if (use_enginecopy(fb)) {
+ copy_with_engine(blit, fb, &linear->fb);
+ syncobj_wait(fd, &blit->ibb->engine_syncobj, 1, INT64_MAX, 0, NULL);
+ } else {
+ copy_with_blit(blit, &linear->fb, fb);
+ }
+
gem_close(fd, linear->fb.gem_handle);
} else {
gem_munmap(linear->map, linear->fb.size);
@@ -2848,7 +3049,8 @@ static void setup_linear_mapping(struct fb_blit_upload *blit)
struct igt_fb *fb = blit->fb;
struct fb_blit_linear *linear = &blit->linear;
- if (!igt_vc4_is_tiled(fb->modifier) && use_enginecopy(fb)) {
+ if (is_xe_device(fd) ||
+ (!igt_vc4_is_tiled(fb->modifier) && use_enginecopy(fb))) {
blit->bops = buf_ops_create(fd);
blit->ibb = intel_bb_create(fd, 4096);
}
@@ -2889,7 +3091,10 @@ static void setup_linear_mapping(struct fb_blit_upload *blit)
linear->map = igt_nouveau_mmap_bo(&linear->fb, PROT_READ | PROT_WRITE);
} else if (is_xe_device(fd)) {
- copy_with_engine(blit, &linear->fb, fb);
+ if (use_enginecopy(fb))
+ copy_with_engine(blit, &linear->fb, fb);
+ else
+ copy_with_blit(blit, &linear->fb, fb);
linear->map = xe_bo_mmap_ext(fd, linear->fb.gem_handle,
linear->fb.size, PROT_READ | PROT_WRITE);
diff --git a/lib/intel_bufops.c b/lib/intel_bufops.c
index 524757933..2c91adb88 100644
--- a/lib/intel_bufops.c
+++ b/lib/intel_bufops.c
@@ -927,7 +927,8 @@ static void __intel_buf_init(struct buf_ops *bops,
/* Store gem bo size */
buf->bo_size = size;
- set_hw_tiled(bops, buf);
+ if (bops->driver == INTEL_DRIVER_I915)
+ set_hw_tiled(bops, buf);
}
/**
@@ -1502,14 +1503,18 @@ static struct buf_ops *__buf_ops_create(int fd, bool check_idempotency)
bops->intel_gen, bops->supported_tiles,
bops->driver == INTEL_DRIVER_I915 ? "i915" : "xe");
- /* No tiling support in XE. */
if (bops->driver == INTEL_DRIVER_XE) {
- bops->supported_hw_tiles = TILE_NONE;
-
bops->linear_to_x = copy_linear_to_x;
bops->x_to_linear = copy_x_to_linear;
bops->linear_to_y = copy_linear_to_y;
bops->y_to_linear = copy_y_to_linear;
+ bops->linear_to_tile4 = copy_linear_to_tile4;
+ bops->tile4_to_linear = copy_tile4_to_linear;
+
+ bops->linear_to_yf = NULL;
+ bops->yf_to_linear = NULL;
+ bops->linear_to_ys = NULL;
+ bops->ys_to_linear = NULL;
return bops;
}
diff --git a/tests/i915/kms_big_fb.c b/tests/i915/kms_big_fb.c
index c120a14a6..34e6e9c46 100644
--- a/tests/i915/kms_big_fb.c
+++ b/tests/i915/kms_big_fb.c
@@ -928,10 +928,6 @@ igt_main
for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
igt_subtest_f("%s-addfb-size-overflow",
modifiers[i].name) {
- /* No tiling support in XE. */
- igt_skip_on(is_xe_device(data.drm_fd) &&
- modifiers[i].modifier != DRM_FORMAT_MOD_LINEAR);
-
data.modifier = modifiers[i].modifier;
test_size_overflow(&data);
}
@@ -941,10 +937,6 @@ igt_main
for (int i = 1; i < ARRAY_SIZE(modifiers); i++) {
igt_subtest_f("%s-addfb-size-offset-overflow",
modifiers[i].name) {
- /* No tiling support in XE. */
- igt_skip_on(is_xe_device(data.drm_fd) &&
- modifiers[i].modifier != DRM_FORMAT_MOD_LINEAR);
-
data.modifier = modifiers[i].modifier;
test_size_offset_overflow(&data);
}
@@ -953,10 +945,6 @@ igt_main
igt_describe("Sanity check if addfb ioctl works correctly for given size and strides of fb");
for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
igt_subtest_f("%s-addfb", modifiers[i].name) {
- /* No tiling support in XE. */
- igt_skip_on(is_xe_device(data.drm_fd) &&
- modifiers[i].modifier != DRM_FORMAT_MOD_LINEAR);
-
data.modifier = modifiers[i].modifier;
test_addfb(&data);
}
@@ -974,13 +962,8 @@ igt_main
igt_describe("Sanity check if addfb ioctl works correctly for given "
"combination of modifier formats and rotation");
igt_subtest_f("%s-%dbpp-rotate-%d", modifiers[i].name,
- formats[j].bpp, rotations[k].angle) {
- /* No tiling support in XE. */
- igt_skip_on(is_xe_device(data.drm_fd) &&
- data.modifier != DRM_FORMAT_MOD_LINEAR);
-
+ formats[j].bpp, rotations[k].angle)
test_scanout(&data);
- }
}
igt_fixture
@@ -1022,10 +1005,6 @@ igt_main
igt_require(intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 5);
data.max_hw_fb_width = min(data.hw_stride / (formats[j].bpp >> 3), data.max_fb_width);
- /* No tiling support in XE. */
- igt_skip_on(is_xe_device(data.drm_fd) &&
- modifiers[i].modifier != DRM_FORMAT_MOD_LINEAR);
-
test_scanout(&data);
}
diff --git a/tests/i915/kms_ccs.c b/tests/i915/kms_ccs.c
index abe464b47..835752b1c 100644
--- a/tests/i915/kms_ccs.c
+++ b/tests/i915/kms_ccs.c
@@ -25,6 +25,7 @@
#include "igt.h"
#include "i915/gem_create.h"
+#include "xe/xe_ioctl.h"
#define SDR_PLANE_BASE 3
@@ -186,17 +187,19 @@ static void check_ccs_plane(int drm_fd, igt_fb_t *fb, int plane)
ccs_size = fb->strides[plane] * fb->plane_height[plane];
igt_assert(ccs_size);
- gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, 0);
-
- map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_READ);
-
+ if (is_i915_device(drm_fd)) {
+ gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_READ);
+ } else {
+ map = xe_bo_mmap_ext(drm_fd, fb->gem_handle, fb->size, PROT_READ);
+ }
ccs_size = fb->strides[plane] * fb->plane_height[plane];
ccs_p = map + fb->offsets[plane];
for (i = 0; i < ccs_size; i += sizeof(uint32_t))
if (*(uint32_t *)(ccs_p + i))
break;
- munmap(map, fb->size);
+ igt_assert(gem_munmap(map, fb->size) == 0);
igt_assert_f(i < ccs_size,
"CCS plane %d (for main plane %d) lacks compression meta-data\n",
@@ -212,9 +215,12 @@ static void check_ccs_cc_plane(int drm_fd, igt_fb_t *fb, int plane, const float
void *map;
uint32_t native_color;
- gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, 0);
-
- map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_READ);
+ if (is_i915_device(drm_fd)) {
+ gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, 0);
+ map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_READ);
+ } else {
+ map = xe_bo_mmap_ext(drm_fd, fb->gem_handle, fb->size, PROT_READ);
+ }
cc_p = map + fb->offsets[plane];
igt_assert(cc_color[0] == cc_p[0].f &&
@@ -229,7 +235,7 @@ static void check_ccs_cc_plane(int drm_fd, igt_fb_t *fb, int plane, const float
igt_assert(native_color == cc_p[4].d);
- munmap(map, fb->size);
+ igt_assert(gem_munmap(map, fb->size) == 0);
};
static void check_all_ccs_planes(int drm_fd, igt_fb_t *fb, const float *cc_color, bool check_cc_plane)
@@ -251,14 +257,17 @@ static void fill_fb_random(int drm_fd, igt_fb_t *fb)
uint8_t *p;
int i;
- gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
-
- p = map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
+ if (is_i915_device(drm_fd)) {
+ gem_set_domain(drm_fd, fb->gem_handle, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+ p = map = gem_mmap__cpu(drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
+ } else {
+ p = map = xe_bo_mmap_ext(drm_fd, fb->gem_handle, fb->size, PROT_READ | PROT_WRITE);
+ }
for (i = 0; i < fb->size; i++)
p[i] = rand();
- munmap(map, fb->size);
+ igt_assert(gem_munmap(map, fb->size) == 0);
}
static void test_bad_ccs_plane(data_t *data, int width, int height, int ccs_plane,
@@ -366,8 +375,9 @@ static void fast_clear_fb(int drm_fd, struct igt_fb *fb, const float *cc_color)
struct buf_ops *bops = buf_ops_create(drm_fd);
struct intel_buf *dst = igt_fb_create_intel_buf(drm_fd, bops, fb, "fast clear dst");
- gem_set_domain(drm_fd, fb->gem_handle,
- I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+ if (is_i915_device(drm_fd))
+ gem_set_domain(drm_fd, fb->gem_handle,
+ I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
fast_clear(ibb, dst, 0, 0, fb->width, fb->height, cc_color);
@@ -687,7 +697,7 @@ igt_main_args("cs:", NULL, help_str, opt_handler, &data)
enum pipe pipe;
igt_fixture {
- data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+ data.drm_fd = drm_open_driver_master(DRIVER_INTEL | DRIVER_XE);
igt_require(intel_display_ver(intel_get_drm_devid(data.drm_fd)) >= 9);
kmstest_set_vt_graphics_mode();
diff --git a/tests/i915/kms_draw_crc.c b/tests/i915/kms_draw_crc.c
index db6d71f2e..137ffeb5c 100644
--- a/tests/i915/kms_draw_crc.c
+++ b/tests/i915/kms_draw_crc.c
@@ -295,10 +295,6 @@ igt_main
for (modifier_idx = 0; modifier_idx < ARRAY_SIZE(modifiers); modifier_idx++) {
modifier = modifiers[modifier_idx];
- /* No tiling support in XE. */
- if (is_xe_device(drm_fd) && modifier != DRM_FORMAT_MOD_LINEAR)
- continue;
-
for (format_idx = 0; format_idx < ARRAY_SIZE(formats); format_idx++) {
if (!igt_display_has_format_mod(&display, formats[format_idx], modifier))
continue;
diff --git a/tests/i915/kms_fb_coherency.c b/tests/i915/kms_fb_coherency.c
index b530bf5dc..2bc3bb237 100644
--- a/tests/i915/kms_fb_coherency.c
+++ b/tests/i915/kms_fb_coherency.c
@@ -15,6 +15,7 @@
#include <string.h>
#include "igt.h"
+#include "xe/xe_ioctl.h"
typedef struct {
int drm_fd;
@@ -90,7 +91,7 @@ static struct igt_fb *prepare_fb(data_t *data)
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
- if (!gem_has_lmem(data->drm_fd)) {
+ if (is_i915_device(data->drm_fd) && !gem_has_lmem(data->drm_fd)) {
uint32_t caching;
/* make sure caching mode has become UC/WT */
@@ -159,7 +160,10 @@ static void test_mmap_offset_wc(data_t *data)
fb = prepare_fb(data);
- buf = gem_mmap_offset__wc(data->drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
+ if (is_i915_device(data->drm_fd))
+ buf = gem_mmap_offset__wc(data->drm_fd, fb->gem_handle, 0, fb->size, PROT_WRITE);
+ else
+ buf = xe_bo_mmap_ext(data->drm_fd, fb->gem_handle, fb->size, PROT_WRITE);
check_buf_crc(data, buf, fb);
}
@@ -225,7 +229,7 @@ igt_main
data_t data;
igt_fixture {
- data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
+ data.drm_fd = drm_open_driver_master(DRIVER_INTEL | DRIVER_XE);
data.devid = intel_get_drm_devid(data.drm_fd);
@@ -245,39 +249,38 @@ igt_main
* mmapped with different mmap methods and different caching modes.
*/
igt_subtest_with_dynamic("memset-crc") {
- if (gem_has_mappable_ggtt(data.drm_fd)) {
+ if (igt_draw_supports_method(data.drm_fd, IGT_DRAW_MMAP_GTT)) {
igt_dynamic("mmap-gtt")
test_mmap_gtt(&data);
cleanup_crtc(&data);
}
- if (gem_mmap_offset__has_wc(data.drm_fd)) {
+ if (igt_draw_supports_method(data.drm_fd, IGT_DRAW_MMAP_WC)) {
igt_dynamic("mmap-offset-wc")
test_mmap_offset_wc(&data);
cleanup_crtc(&data);
}
- if (gem_has_lmem(data.drm_fd)) {
- igt_dynamic("mmap-offset-fixed")
- test_mmap_offset_fixed(&data);
+ if (is_i915_device(data.drm_fd)) {
+ if (gem_has_lmem(data.drm_fd)) {
+ igt_dynamic("mmap-offset-fixed")
+ test_mmap_offset_fixed(&data);
+ } else if (gem_has_mmap_offset(data.drm_fd)) {
+ igt_dynamic("mmap-offset-uc")
+ test_mmap_offset_uc(&data);
+ }
cleanup_crtc(&data);
- } else if (gem_has_mmap_offset(data.drm_fd)) {
- igt_dynamic("mmap-offset-uc")
- test_mmap_offset_uc(&data);
+ if (gem_has_legacy_mmap(data.drm_fd) &&
+ gem_mmap__has_wc(data.drm_fd)) {
+ igt_dynamic("mmap-legacy-wc")
+ test_legacy_mmap_wc(&data);
- cleanup_crtc(&data);
- }
-
- if (gem_has_legacy_mmap(data.drm_fd) &&
- gem_mmap__has_wc(data.drm_fd)) {
- igt_dynamic("mmap-legacy-wc")
- test_legacy_mmap_wc(&data);
-
- cleanup_crtc(&data);
+ cleanup_crtc(&data);
+ }
}
}
diff --git a/tests/i915/kms_fbcon_fbt.c b/tests/i915/kms_fbcon_fbt.c
index 6c557dca7..2b8ae1763 100644
--- a/tests/i915/kms_fbcon_fbt.c
+++ b/tests/i915/kms_fbcon_fbt.c
@@ -378,7 +378,7 @@ static void setup_environment(struct drm_info *drm)
{
int i;
- drm->fd = drm_open_driver_master(DRIVER_INTEL);
+ drm->fd = drm_open_driver_master(DRIVER_INTEL | DRIVER_XE);
igt_require(drm->fd >= 0);
drm->debugfs_fd = igt_debugfs_dir(drm->fd);
igt_require(drm->debugfs_fd >= 0);
diff --git a/tests/i915/kms_flip_scaled_crc.c b/tests/i915/kms_flip_scaled_crc.c
index f5dc430e3..63dc095e0 100644
--- a/tests/i915/kms_flip_scaled_crc.c
+++ b/tests/i915/kms_flip_scaled_crc.c
@@ -644,12 +644,6 @@ igt_main
for (int index = 0; index < ARRAY_SIZE(flip_scenario_test); index++) {
igt_describe(flip_scenario_test[index].describe);
igt_subtest_with_dynamic(flip_scenario_test[index].name) {
- /* No tiling support in XE. */
- if (is_xe_device(data.drm_fd) &&
- (flip_scenario_test[index].firstmodifier != DRM_FORMAT_MOD_LINEAR ||
- flip_scenario_test[index].secondmodifier != DRM_FORMAT_MOD_LINEAR))
- continue;
-
free_fbs(&data);
for_each_pipe(&data.display, pipe) {
bool found = false;
diff --git a/tests/i915/kms_flip_tiling.c b/tests/i915/kms_flip_tiling.c
index a22f12382..9c3d149c4 100644
--- a/tests/i915/kms_flip_tiling.c
+++ b/tests/i915/kms_flip_tiling.c
@@ -217,12 +217,6 @@ igt_main
if (plane->formats[j] != data.testformat)
continue;
- /* No tiling support in XE. */
- if (is_xe_device(data.drm_fd) &&
- (plane->modifiers[i] != DRM_FORMAT_MOD_LINEAR ||
- plane->modifiers[j] != DRM_FORMAT_MOD_LINEAR))
- continue;
-
igt_dynamic_f("%s-pipe-%s-%s-to-%s",
igt_output_name(output),
kmstest_pipe_name(pipe),
diff --git a/tests/kms_addfb_basic.c b/tests/kms_addfb_basic.c
index e375f3ad2..426e72c3c 100644
--- a/tests/kms_addfb_basic.c
+++ b/tests/kms_addfb_basic.c
@@ -391,7 +391,7 @@ static void tiling_tests(int fd)
igt_subtest_group {
igt_fixture {
- igt_require_i915(fd);
+ igt_require_intel(fd);
tiled_x_bo = igt_create_bo_with_dimensions(fd, 1024, 1024,
DRM_FORMAT_XRGB8888, I915_FORMAT_MOD_X_TILED,
1024*4, NULL, NULL, NULL);
@@ -410,7 +410,8 @@ static void tiling_tests(int fd)
f.pitches[0] = 1024*4;
igt_describe("Check if addfb2 and rmfb call works for basic x-tiling test");
igt_subtest("basic-x-tiled-legacy") {
- igt_require(gem_available_fences(fd) > 0);
+ if (is_i915_device(fd))
+ igt_require(gem_available_fences(fd) > 0);
f.handles[0] = tiled_x_bo;
do_ioctl(fd, DRM_IOCTL_MODE_ADDFB2, &f);
@@ -420,6 +421,7 @@ static void tiling_tests(int fd)
igt_describe("Check if addfb2 call works for x and y tiling");
igt_subtest("framebuffer-vs-set-tiling") {
+ igt_require_i915(fd);
igt_require(gem_available_fences(fd) > 0);
f.handles[0] = gem_bo;
@@ -434,6 +436,7 @@ static void tiling_tests(int fd)
igt_describe("Test that addfb2 call fails correctly for pitches mismatch");
f.pitches[0] = 512*4;
igt_subtest("tile-pitch-mismatch") {
+ igt_require_i915(fd);
igt_require(gem_available_fences(fd) > 0);
f.handles[0] = tiled_x_bo;
@@ -443,8 +446,12 @@ static void tiling_tests(int fd)
igt_describe("Test that addfb2 call fails correctly for basic y-tiling test");
f.pitches[0] = 1024*4;
igt_subtest("basic-y-tiled-legacy") {
- igt_require(!gem_has_lmem(fd));
- igt_require(gem_available_fences(fd) > 0);
+ if (is_i915_device(fd)) {
+ igt_require(!gem_has_lmem(fd));
+ igt_require(gem_available_fences(fd) > 0);
+ } else {
+ igt_require(!xe_has_vram(fd));
+ }
f.handles[0] = tiled_y_bo;
do_ioctl_err(fd, DRM_IOCTL_MODE_ADDFB2, &f, EINVAL);
@@ -998,7 +1005,7 @@ igt_main
size_tests(fd);
igt_fixture
- igt_require_i915(fd);
+ igt_require_intel(fd);
addfb25_ytile(fd);
diff --git a/tests/kms_async_flips.c b/tests/kms_async_flips.c
index 5cb797dec..9bea54027 100644
--- a/tests/kms_async_flips.c
+++ b/tests/kms_async_flips.c
@@ -229,7 +229,7 @@ static void test_async_flip(data_t *data)
* in order to change the watermark levels as per the optimization. Hence the
* subsequent async flips will actually do the asynchronous flips.
*/
- if (is_i915_device(data->drm_fd)) {
+ if (is_intel_device(data->drm_fd)) {
uint32_t devid = intel_get_drm_devid(data->drm_fd);
if (IS_GEN9(devid) || IS_GEN10(devid) || AT_LEAST_GEN(devid, 12)) {
@@ -600,13 +600,7 @@ igt_main
int i;
igt_fixture {
- /*
- * FIXME: As of now, Async flips won't work with linear buffers
- * on Intel hardware, hence don't run tests on XE device as XE
- * won't support tiling.
- * Once Kernel changes got landed, please update this logic.
- */
- data.drm_fd = drm_open_driver_master(DRIVER_ANY & ~DRIVER_XE);
+ data.drm_fd = drm_open_driver_master(DRIVER_ANY);
kmstest_set_vt_graphics_mode();
igt_display_require(&data.display, data.drm_fd);
igt_display_require_output(&data.display);
@@ -654,7 +648,7 @@ igt_main
igt_describe("Negative case to verify if changes in fb are rejected from kernel as expected");
igt_subtest_with_dynamic("invalid-async-flip") {
/* TODO: support more vendors */
- igt_require(is_i915_device(data.drm_fd));
+ igt_require(is_intel_device(data.drm_fd));
igt_require(igt_display_has_format_mod(&data.display, DRM_FORMAT_XRGB8888,
I915_FORMAT_MOD_Y_TILED));
diff --git a/tests/kms_cursor_edge_walk.c b/tests/kms_cursor_edge_walk.c
index 5f423a18f..9ebc8d590 100644
--- a/tests/kms_cursor_edge_walk.c
+++ b/tests/kms_cursor_edge_walk.c
@@ -335,7 +335,7 @@ igt_main_args("", long_opts, help_str, opt_handler, &data)
data.drm_fd = drm_open_driver_master(DRIVER_ANY);
- if (is_i915_device(data.drm_fd))
+ if (is_intel_device(data.drm_fd))
data.devid = intel_get_drm_devid(data.drm_fd);
ret = drmGetCap(data.drm_fd, DRM_CAP_CURSOR_WIDTH, &max_curw);
diff --git a/tests/kms_cursor_legacy.c b/tests/kms_cursor_legacy.c
index f7a6202cf..9d0ace7fb 100644
--- a/tests/kms_cursor_legacy.c
+++ b/tests/kms_cursor_legacy.c
@@ -1505,7 +1505,10 @@ static void flip_vs_cursor_busy_crc(igt_display_t *display, bool atomic)
igt_output_t *output;
igt_plane_t *cursor;
- ahnd = get_reloc_ahnd(display->drm_fd, 0);
+ if (is_i915_device(display->drm_fd))
+ ahnd = get_reloc_ahnd(display->drm_fd, 0);
+ else
+ ahnd = intel_allocator_open(display->drm_fd, 0, INTEL_ALLOCATOR_RELOC);
if (atomic)
igt_require(display->is_atomic);
@@ -1747,7 +1750,7 @@ igt_main
igt_describe("this test perform a busy bo update followed by a cursor update");
igt_subtest_group {
igt_fixture {
- igt_require_i915(display.drm_fd);
+ igt_require_intel(display.drm_fd);
igt_require_pipe_crc(display.drm_fd);
igt_display_require_output(&display);
}
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index f1e0700c1..3e62d669a 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -1588,7 +1588,7 @@ static void run_test(int duration, int flags)
struct test_output o;
int i, n, modes = 0;
- /* No tiling support in XE. */
+ /* FIXME: Add blit support for XE. */
if (is_xe_device(drm_fd) && flags & TEST_FENCE_STRESS)
return;
@@ -1664,7 +1664,7 @@ static void run_pair(int duration, int flags)
struct test_output o;
int i, j, m, n, modes = 0;
- /* No tiling support in XE. */
+ /* FIXME: Add blit support for XE. */
if (is_xe_device(drm_fd) && flags & TEST_FENCE_STRESS)
return;
diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
index f44f42551..00df86929 100644
--- a/tests/kms_getfb.c
+++ b/tests/kms_getfb.c
@@ -43,6 +43,7 @@
#include "i915/gem_create.h"
#include "igt_device.h"
#include "xe/xe_query.h"
+#include "xe/xe_ioctl.h"
IGT_TEST_DESCRIPTION("Tests GETFB and GETFB2 ioctls.");
@@ -140,7 +141,10 @@ static void get_ccs_fb(int fd, struct drm_mode_fb_cmd2 *ret)
size += add.pitches[1] * ALIGN(ALIGN(add.height, 16) / 16, 32);
}
- add.handles[0] = gem_buffer_create_fb_obj(fd, size);
+ if (is_i915_device(fd))
+ add.handles[0] = gem_buffer_create_fb_obj(fd, size);
+ else
+ add.handles[0] = xe_bo_create_flags(fd, 0, size, vram_if_possible(fd, 0));
igt_require(add.handles[0] != 0);
if (!HAS_FLATCCS(devid))
@@ -270,7 +274,7 @@ static void test_duplicate_handles(int fd)
struct drm_mode_fb_cmd2 add_ccs = { };
struct drm_mode_fb_cmd get = { };
- igt_require_i915(fd);
+ igt_require_intel(fd);
igt_require_f(!HAS_FLATCCS(intel_get_drm_devid(fd)),
"skip because flat ccs has only one buffer.\n");
@@ -345,7 +349,7 @@ static void test_getfb2(int fd)
struct drm_mode_fb_cmd2 get = { };
int i;
- igt_require_i915(fd);
+ igt_require_intel(fd);
get_ccs_fb(fd, &add_ccs);
igt_require(add_ccs.fb_id != 0);
get.fb_id = add_ccs.fb_id;
diff --git a/tests/kms_plane.c b/tests/kms_plane.c
index dfc6a8c57..106264306 100644
--- a/tests/kms_plane.c
+++ b/tests/kms_plane.c
@@ -1003,10 +1003,6 @@ static bool test_format_plane(data_t *data, enum pipe pipe,
.modifier = plane->modifiers[i],
};
- if (is_xe_device(data->drm_fd) &&
- f.modifier != DRM_FORMAT_MOD_LINEAR)
- continue;
-
if (f.format == ref.format &&
f.modifier == ref.modifier)
continue;
diff --git a/tests/kms_plane_lowres.c b/tests/kms_plane_lowres.c
index db9f5a54c..e8739d91b 100644
--- a/tests/kms_plane_lowres.c
+++ b/tests/kms_plane_lowres.c
@@ -269,9 +269,6 @@ static void run_test(data_t *data, uint64_t modifier)
if(!igt_display_has_format_mod(&data->display, DRM_FORMAT_XRGB8888, modifier))
return;
- if (is_xe_device(data->drm_fd) && modifier != DRM_FORMAT_MOD_LINEAR)
- return;
-
for_each_pipe(&data->display, pipe) {
for_each_valid_output_on_pipe(&data->display, pipe, output) {
data->pipe = pipe;
diff --git a/tests/kms_plane_scaling.c b/tests/kms_plane_scaling.c
index 77bb905b4..1bbc1e009 100644
--- a/tests/kms_plane_scaling.c
+++ b/tests/kms_plane_scaling.c
@@ -545,10 +545,6 @@ static void test_scaler_with_modifier_pipe(data_t *d,
for (int i = 0; i < ARRAY_SIZE(modifiers); i++) {
uint64_t modifier = modifiers[i];
- if (is_xe_device(d->drm_fd) &&
- modifier != DRM_FORMAT_MOD_LINEAR)
- continue;
-
if (igt_plane_has_format_mod(plane, format, modifier))
check_scaling_pipe_plane_rot(d, plane,
format, modifier,
diff --git a/tests/kms_rotation_crc.c b/tests/kms_rotation_crc.c
index 0a22cc225..d4a8df928 100644
--- a/tests/kms_rotation_crc.c
+++ b/tests/kms_rotation_crc.c
@@ -853,10 +853,6 @@ static void test_multi_plane_rotation(data_t *data, enum pipe pipe)
igt_pipe_crc_start(data->pipe_crc);
for (i = 0; i < ARRAY_SIZE(planeconfigs); i++) {
- if (is_xe_device(data->gfx_fd) &&
- planeconfigs[i].modifier != DRM_FORMAT_MOD_LINEAR)
- continue;
-
p[0].fbinfo = &planeconfigs[i];
pointlocation(data, p, mode, 0);
@@ -1218,7 +1214,7 @@ igt_main_args("", long_opts, help_str, opt_handler, &data)
igt_describe("Tiling and Rotation test for gen 10+ for primary plane");
for (reflect_x = reflect_x_subtests; reflect_x->modifier; reflect_x++) {
igt_fixture
- igt_require_i915(data.gfx_fd);
+ igt_require_intel(data.gfx_fd);
igt_subtest_f("primary-%s-reflect-x-%s",
modifier_test_str(reflect_x->modifier),
@@ -1279,7 +1275,7 @@ igt_main_args("", long_opts, help_str, opt_handler, &data)
enum pipe pipe;
igt_output_t *output;
- igt_require_i915(data.gfx_fd);
+ igt_require_intel(data.gfx_fd);
igt_display_require_output(&data.display);
for_each_pipe_with_valid_output(&data.display, pipe, output) {
--
2.40.0
More information about the Intel-gfx-trybot
mailing list