[PATCH] drm/i915/psr: Add 1 line margin into wake times

[Jouni Högander]

We are observing problems related to wake times. Add 1 line margin
into IO wake and fast wake times.

Also add some more debug to see how PSR2 is configured and how our
wake time calculatin is workin.

Signed-off-by: Jouni Högander <jouni.hogander at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 31084d95711d..78fd064f8f07 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -595,6 +595,8 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 	 */
 	intel_de_write(dev_priv, EDP_PSR_CTL(intel_dp->psr.transcoder), 0);
 
+	drm_dbg_kms(&dev_priv->drm, "PSR2 CTL = 0x%x\n", val);
+
 	intel_de_write(dev_priv, EDP_PSR2_CTL(intel_dp->psr.transcoder), val);
 }
 
@@ -852,6 +854,11 @@ static bool _compute_psr2_wake_times(struct intel_dp *intel_dp,
 		io_wake_lines = fast_wake_lines = max_wake_lines;
 
 	/* According to Bspec lower limit should be set as 7 lines. */
+	drm_dbg_kms(&i915->drm, "Added 1 line margin into io_wake_lines (now %d)\n",
+		    ++io_wake_lines);
+	drm_dbg_kms(&i915->drm, "Added 1 line margin into fast_wake_lines (now %d)\n",
+		    ++fast_wake_lines);
+
 	intel_dp->psr.io_wake_lines = max(io_wake_lines, 7);
 	intel_dp->psr.fast_wake_lines = max(fast_wake_lines, 7);
 
-- 
2.34.1