[PATCH 08/13] drm/i915/dp: Avoid forcing DSC BPC for MST case
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Thu May 11 07:28:03 UTC 2023
For MST the bpc is hardcoded to 8, and pipe bpp to 24.
So avoid forcing DSC bpc for MST case.
v2: Warn and ignore the debug flag than to bail out. (Jani)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 11 +++++------
drivers/gpu/drm/i915/display/intel_dp_mst.c | 5 +++++
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index a7cc9d418f22..7ea4f27a4bf5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1669,14 +1669,13 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
if (!intel_dp_dsc_supports_format(intel_dp, pipe_config->output_format))
return -EINVAL;
- if (compute_pipe_bpp)
+ if (intel_dp->force_dsc_bpc && compute_pipe_bpp) {
+ pipe_bpp = intel_dp->force_dsc_bpc * 3;
+ drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d\n", pipe_bpp);
+ } else if (compute_pipe_bpp) {
pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, conn_state->max_requested_bpc);
- else
+ } else {
pipe_bpp = pipe_config->pipe_bpp;
-
- if (intel_dp->force_dsc_bpc) {
- pipe_bpp = intel_dp->force_dsc_bpc * 3;
- drm_dbg_kms(&dev_priv->drm, "Input DSC BPP forced to %d", pipe_bpp);
}
/* Min Input BPC for ICL+ is 8 */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index d92af6122763..636e3e8e57e8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -361,6 +361,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
/* enable compression if the mode doesn't fit available BW */
drm_dbg_kms(&dev_priv->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
if (ret || intel_dp->force_dsc_en) {
+ /*
+ * FIXME: As bpc is hardcoded to 8, as mentioned above,
+ * WARN and ignore the debug flag force_dsc_bpc for now.
+ */
+ drm_WARN(&dev_priv->drm, intel_dp->force_dsc_bpc, "Cannot Force BPC for MST\n");
/*
* Try to get at least some timeslots and then see, if
* we can fit there with DSC.
--
2.25.1
More information about the Intel-gfx-trybot
mailing list