[PATCH 1/5] drm/i915: Add platform macro for selective tlb flush

Janusz Krzysztofik janusz.krzysztofik at linux.intel.com
Thu Sep 28 15:58:51 UTC 2023


From: Nirmoy Das <nirmoy.das at intel.com>

Add support for selective TLB invalidation, which is a platform
feature supported on XeHP and ADL at this moment.

Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 +++
 drivers/gpu/drm/i915/i915_pci.c          | 5 ++++-
 drivers/gpu/drm/i915/intel_device_info.h | 1 +
 3 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 511eba3bbdbae..f3e2093d36614 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -777,6 +777,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GT_UC(i915)	(INTEL_INFO(i915)->has_gt_uc)
 
+#define HAS_SELECTIVE_TLB_INVALIDATION(dev_priv) \
+	(INTEL_INFO(dev_priv)->has_selective_tlb_invalidation)
+
 #define HAS_POOLED_EU(i915)	(RUNTIME_INFO(i915)->has_pooled_eu)
 
 #define HAS_GLOBAL_MOCS_REGISTERS(i915)	(INTEL_INFO(i915)->has_global_mocs)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df7c261410f79..3836dbffe7022 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -686,6 +686,7 @@ static const struct intel_device_info adl_s_info = {
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.dma_mask_size = 39,
+	.has_selective_tlb_invalidation = 1,
 };
 
 static const struct intel_device_info adl_p_info = {
@@ -695,6 +696,7 @@ static const struct intel_device_info adl_p_info = {
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.__runtime.ppgtt_size = 48,
 	.dma_mask_size = 39,
+	.has_selective_tlb_invalidation = 1,
 };
 
 #undef GEN
@@ -728,7 +730,8 @@ static const struct intel_device_info adl_p_info = {
 	.has_runtime_pm = 1, \
 	.max_pat_index = 3, \
 	.__runtime.ppgtt_size = 48, \
-	.__runtime.ppgtt_type = INTEL_PPGTT_FULL
+	.__runtime.ppgtt_type = INTEL_PPGTT_FULL, \
+	.has_selective_tlb_invalidation = 1
 
 #define XE_HPM_FEATURES \
 	.__runtime.media.ip.ver = 12, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 39817490b13fd..fa707ed7d38d1 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -169,6 +169,7 @@ enum intel_ppgtt_type {
 	func(has_rc6p); \
 	func(has_rps); \
 	func(has_runtime_pm); \
+	func(has_selective_tlb_invalidation); \
 	func(has_snoop); \
 	func(has_coherent_ggtt); \
 	func(tuning_thread_rr_after_dep); \
-- 
2.42.0



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