[PATCH 4/5] drm/i915: Do GuC based TLB invalidation when supported

[Janusz Krzysztofik]

From: Nirmoy Das <nirmoy.das at intel.com>

Do GuC based TLB on supported platforms and when GuC
is running.

v2 (Janusz):
  - reorder GuC status checks: first is_running, then is_used, otherwise
    is_used may oops,
  - call guc_gtt_ct_invalidate() for each gt.

Signed-off-by: Nirmoy Das <nirmoy.das at intel.com>
Signed-off-by: Janusz Krzysztofik <janusz.krzysztofik at linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_ggtt.c | 28 ++++++++++++++++++++++++----
 drivers/gpu/drm/i915/gt/intel_tlb.c  | 10 +++++++++-
 2 files changed, 33 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index da21f2786b5d7..f690e32d60f2a 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -201,6 +201,18 @@ static void gen8_ggtt_invalidate(struct i915_ggtt *ggtt)
 	intel_uncore_write_fw(uncore, GFX_FLSH_CNTL_GEN6, GFX_FLSH_CNTL_EN);
 }
 
+static void guc_ggtt_ct_invalidate(struct intel_gt *gt)
+{
+	struct intel_uncore *uncore = gt->uncore;
+	intel_wakeref_t wakeref;
+
+	with_intel_runtime_pm_if_active(uncore->rpm, wakeref) {
+		struct intel_guc *guc = &gt->uc.guc;
+
+		intel_guc_invalidate_tlb_guc(guc);
+	}
+}
+
 static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
 {
 	struct drm_i915_private *i915 = ggtt->vm.i915;
@@ -210,10 +222,18 @@ static void guc_ggtt_invalidate(struct i915_ggtt *ggtt)
 	if (GRAPHICS_VER(i915) >= 12) {
 		struct intel_gt *gt;
 
-		list_for_each_entry(gt, &ggtt->gt_list, ggtt_link)
-			intel_uncore_write_fw(gt->uncore,
-					      GEN12_GUC_TLB_INV_CR,
-					      GEN12_GUC_TLB_INV_CR_INVALIDATE);
+		list_for_each_entry(gt, &ggtt->gt_list, ggtt_link) {
+			struct intel_guc *guc = &gt->uc.guc;
+
+			if (HAS_SELECTIVE_TLB_INVALIDATION(gt->i915) &&
+			    intel_guc_is_ready(guc) &&
+			    intel_guc_submission_is_used(guc))
+				guc_ggtt_ct_invalidate(gt);
+			else
+				intel_uncore_write_fw(gt->uncore,
+					       GEN12_GUC_TLB_INV_CR,
+					       GEN12_GUC_TLB_INV_CR_INVALIDATE);
+		}
 	} else {
 		intel_uncore_write_fw(ggtt->vm.gt->uncore,
 				      GEN8_GTCR, GEN8_GTCR_INVALIDATE);
diff --git a/drivers/gpu/drm/i915/gt/intel_tlb.c b/drivers/gpu/drm/i915/gt/intel_tlb.c
index 139608c30d978..91807866fedf9 100644
--- a/drivers/gpu/drm/i915/gt/intel_tlb.c
+++ b/drivers/gpu/drm/i915/gt/intel_tlb.c
@@ -12,6 +12,7 @@
 #include "intel_gt_print.h"
 #include "intel_gt_regs.h"
 #include "intel_tlb.h"
+#include "uc/intel_guc.h"
 
 /*
  * HW architecture suggest typical invalidation time at 40us,
@@ -131,11 +132,18 @@ void intel_gt_invalidate_tlb_full(struct intel_gt *gt, u32 seqno)
 		return;
 
 	with_intel_gt_pm_if_awake(gt, wakeref) {
+		struct intel_guc *guc = &gt->uc.guc;
+
 		mutex_lock(&gt->tlb.invalidate_lock);
 		if (tlb_seqno_passed(gt, seqno))
 			goto unlock;
 
-		mmio_invalidate_full(gt);
+		if (HAS_SELECTIVE_TLB_INVALIDATION(gt->i915) &&
+		    intel_guc_submission_is_used(guc) &&
+		    intel_guc_is_ready(guc))
+			intel_guc_invalidate_tlb_full(guc);
+		else
+			mmio_invalidate_full(gt);
 
 		write_seqcount_invalidate(&gt->tlb.seqno);
 unlock:
-- 
2.42.0