[PATCH 00/29] Enable Ultrajoiner for BMG
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Wed Aug 21 10:19:16 UTC 2024
Add Ultrajoiner support for BMG.
Some Ultrajoiner scenarios require 12 DSC slices, so add support for 3
VDS engines. Add Pixel Replication and Odd pixel removal which are
required when 12 DSC slices are needed.
Implement Wa_14021768792 to bypass the Link_m_n limitation on BMG.
Ankit Nautiyal (22):
drm/i915/dp: Add dp link rates for BMG
drm/i915/dp: Fix potential overflow in bandwidth calculation for DSC
config
drm/i915/display: Modify debugfs for joiner to force n pipes
drm/i915/display: Use joined pipes in intel_dp_joiner_needs_dsc
drm/i915/display: Use joined pipes in intel_mode_valid_max_plane_size
drm/i915/display: Use joined pipes in dsc helpers for slices, bpp
drm/i915/display: Modify maxdotclock helper for ultrajoiner
drm/i915/intel_dp: Add support for forcing ultrajoiner
drm/i915/display: Prepare for dsc 3 stream splitter
drm/i915/vdsc: Use VDSC0/VDSC1 for LEFT/RIGHT VDSC engine
drm/i915/vdsc: Add register bits for VDSC2 engine
drm/i915/vdsc: Add support for read/write PPS for DSC3
drm/i915/dp: Add check for hdisplay divisible by slice count
drm/i915/display: Add DSC pixel replication
drm/i915/dp: Compute pixel replication count for DSC 12 slices case
drm/i915/dsc: Account for Odd pixel removal
drm/i915/dp: Add support for 3 vdsc engines and 12 slices.
drm/i915/display: Add bits for link_n_exended for DISPLAY >= 14
drm/i915/display: Limit m/n ratio to 10 for BMG + Display > 14
drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10
drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n
ratio > 10
drm/i915: Add Wa_14021768792 as per WA framework
Stanislav Lisovskiy (7):
drm/i915: Add some essential functionality for joiners
drm/i915: Split current joiner hw state readout
drm/i915: Add bigjoiner and uncompressed joiner hw readout sanity
checks
drm/i915: Implement hw state readout and checks for ultrajoiner
drm/i915/display/vdsc: Add ultrajoiner support with DSC
drm/i915: Compute config and mode valid changes for ultrajoiner
drm/i915: Add new abstraction layer to handle pipe order for different
joiners
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 19 +-
drivers/gpu/drm/i915/display/intel_display.c | 497 +++++++++++++++---
drivers/gpu/drm/i915/display/intel_display.h | 33 +-
.../drm/i915/display/intel_display_debugfs.c | 71 ++-
.../drm/i915/display/intel_display_types.h | 21 +-
.../gpu/drm/i915/display/intel_display_wa.h | 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 282 ++++++++--
drivers/gpu/drm/i915/display/intel_dp.h | 22 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 92 ++--
drivers/gpu/drm/i915/display/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 15 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
.../drm/i915/display/intel_modeset_verify.c | 2 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 117 ++++-
.../gpu/drm/i915/display/intel_vdsc_regs.h | 25 +-
drivers/gpu/drm/i915/i915_reg.h | 7 +
drivers/gpu/drm/xe/display/xe_display_wa.c | 5 +
drivers/gpu/drm/xe/xe_wa_oob.rules | 1 +
20 files changed, 1012 insertions(+), 207 deletions(-)
--
2.45.2
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