[PATCH 02/29] drm/i915/dp: Fix potential overflow in bandwidth calculation for DSC config

[Ankit Nautiyal]

In the function is_bw_sufficient_for_dsc_config overflow can occur for
higher link rates. Avoid potential overflow by using 64-bit integers
for bandwidth calculations.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index ce9d493074e7..4b0a3b1729aa 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1887,10 +1887,10 @@ static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 link_cloc
 					    enum intel_output_format output_format,
 					    int timeslots)
 {
-	u32 available_bw, required_bw;
+	u64 available_bw, required_bw;
 
-	available_bw = (link_clock * lane_count * timeslots * 16)  / 8;
-	required_bw = compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock));
+	available_bw = DIV_ROUND_DOWN_ULL((u64) link_clock * lane_count * timeslots * 16, 8);
+	required_bw = (u64) compressed_bppx16 * (intel_dp_mode_to_fec_clock(mode_clock));
 
 	return available_bw > required_bw;
 }
-- 
2.45.2