[PATCH v3 01/15] drm/i915/gt: Avoid using masked workaround for CCS_MODE setting
Andi Shyti
andi.shyti at linux.intel.com
Fri Aug 23 00:15:24 UTC 2024
When setting the CCS mode, we mistakenly used wa_masked_en() to
apply the workaround, which reads from the register and masks the
existing value with the new one.
Our intention was to write the value directly, without masking
it.
So far, this hasn't caused issues because we've been using a
register value that only enables a single CCS engine, typically
with an ID of '0'.
However, in upcoming patches, we will be utilizing multiple
engines, and it's crucial that we write the new value directly
without any masking.
Signed-off-by: Andi Shyti <andi.shyti at linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index bfe6d8fc820f..f3082fad3f45 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2745,7 +2745,7 @@ static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct i915_wa_li
* assign all slices to a single CCS. We will call it CCS mode 1
*/
mode = intel_gt_apply_ccs_mode(gt);
- wa_masked_en(wal, XEHP_CCS_MODE, mode);
+ wa_add(wal, XEHP_CCS_MODE, 0, mode, mode, false);
}
/*
--
2.45.2
More information about the Intel-gfx-trybot
mailing list