[PATCH 0/6] Enable Adaptive Sync SDP Support for DP
Mitul Golani
mitulkumar.ajitkumar.golani at intel.com
Fri Feb 16 14:18:22 UTC 2024
An Adaptive Sync SDP allows a DP protocol converter to
forward Adaptive Sync video with minimal buffering overhead
within the converter. An Adaptive-Sync-capable DP protocol
converter indicates its support by setting the related bit
in the DPCD register.
Computes AS SDP values based on the display configuration,
ensuring proper handling of Variable Refresh Rate (VRR)
in the context of Adaptive Sync.
--v2:
- Update logging to Patch-1
- use as_sdp instead of async
- Put definitions to correct placeholders from where it is defined.
- Update member types of as_sdp for uniformity.
- Correct use of REG_BIT and REG_GENMASK.
- Remove unrelated comments and changes.
- Correct code indents.
- separate out patch changes for intel_read/write_dp_sdp.
--v3:
- Add VIDEO_DIP_ASYNC_DATA_SIZE definition and comment in as_sdp_pack
function to patch 2 as originally used there. [Patch 2].
- Add VIDEO_DIP_ENABLE_AS_HSW flag to intel_dp_set_infoframes [Patch 3].
--v4:
- Add check for HAS_VRR before writing AS SDP. [Patch 3].
--v5:
- Add missing check for HAS_VRR before reading AS SDP as well [Patch 3].
--v6:
- Rebase all patches.
- Compute TRANS_VRR_VSYNC.
-v7:
- Move vrr_vsync_start/end to compute config.
- Use correct function for drm_debug_printer.
-v8:
- Code refactoring.
- Update, VSYNC_START/END macros to VRR_VSYNC_START/END.(Ankit)
- Update bit fields of VRR_VSYNC_START/END.(Ankit)
- Send patches to dri-devel.(Ankit)
- Update definition names for AS SDP which are starting from
HSW, as these defines are applicable for ADLP+.(Ankit)
- Remove unused bitfield define, AS_SDP_ENABLE.
- Add support in drm for Adaptive Sync sink status, which can be
used later as a check for read/write sdp. (Ankit)
Mitul Golani (6):
drm/dp: Add an support to indicate if sink supports AS SDP
drm: Add Adaptive Sync SDP logging
drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
drm/i915/display: Compute and Enable AS SDP
drm/i915/display: Compute vrr_vsync params
drm/i915/display: Read/Write AS sdp only when sink/source has enabled
drivers/gpu/drm/display/drm_dp_helper.c | 37 +++++
.../drm/i915/display/intel_crtc_state_dump.c | 12 ++
drivers/gpu/drm/i915/display/intel_ddi.c | 4 +
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/display/intel_dp.c | 130 +++++++++++++++++-
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
drivers/gpu/drm/i915/display/intel_hdmi.c | 12 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 14 ++
drivers/gpu/drm/i915/i915_reg.h | 19 +++
include/drm/display/drm_dp.h | 2 +
include/drm/display/drm_dp_helper.h | 34 +++++
12 files changed, 264 insertions(+), 4 deletions(-)
--
2.25.1
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