[PATCH] drm/i915/dp: Do not write into FEC enable bit for UHBR rates

[Chaitanya Kumar Borah]

Hardware automatically enables FEC in 128b/132b mode. Do not set
FEC enable bit explicitly in the register.

Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah at intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 2 +-
 drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3c3fc53376ce..cdb40c1f7f95 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2299,7 +2299,7 @@ static void intel_ddi_enable_fec(struct intel_encoder *encoder,
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 
-	if (!crtc_state->fec_enable)
+	if (!crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state))
 		return;
 
 	intel_de_rmw(dev_priv, dp_tp_ctl_reg(encoder, crtc_state),
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 58a4060f90b4..4a3b3920877e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5270,7 +5270,9 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
 	PIPE_CONF_CHECK_BOOL(has_infoframe);
 	PIPE_CONF_CHECK_BOOL(enhanced_framing);
-	PIPE_CONF_CHECK_BOOL(fec_enable);
+
+	if(!intel_dp_is_uhbr(pipe_config))
+		PIPE_CONF_CHECK_BOOL(fec_enable);
 
 	if (!fastset) {
 		PIPE_CONF_CHECK_BOOL(has_audio);
-- 
2.25.1