[PATCH v7 3/4] drm/i915/psr: Add latency for PSR

[Mitul Golani]

Calculate latency for PSR2 wake lines.

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani at intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 23 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_psr.h |  1 +
 2 files changed, 24 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 16888935b33a..b7dfdd94509c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3972,3 +3972,26 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 		debugfs_create_file("i915_psr_status", 0444, root,
 				    connector, &i915_psr_status_fops);
 }
+
+int intel_psr2_calc_prefill(struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	int wake_lines;
+	struct intel_encoder *encoder;
+
+	intel_psr_lock(crtc_state);
+	for_each_intel_encoder_mask_with_psr(display->drm, encoder,
+					     crtc_state->uapi.encoder_mask) {
+		struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+
+		lockdep_assert_held(&intel_dp->psr.lock);
+
+		if (!intel_psr2_config_valid(intel_dp, crtc_state))
+			return false;
+
+		wake_lines = psr2_block_count_lines(intel_dp);
+	}
+	intel_psr_unlock(crtc_state);
+
+	return wake_lines;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index 956be263c09e..65f936d83aad 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -24,6 +24,7 @@ struct intel_plane_state;
 #define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
 				    (intel_dp)->psr.source_panel_replay_support)
 
+int intel_psr2_calc_prefill(struct intel_crtc_state *crtc_state);
 bool intel_encoder_can_psr(struct intel_encoder *encoder);
 bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
 				  const struct intel_crtc_state *crtc_state);
-- 
2.46.0